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figure 1. typical flyback application. product 3 adapter 1 open frame 2 open frame 2 output power table t able 1. notes: 1. t ypical continuous power in a non-ventilated enclosed adapter measured at 50 c ambient. 2. maximum practical continuous power in an open frame design at 50 c ambient. see key applications for detailed conditions. 3. see part ordering information. 4. 230 vac or 100/115 vac with doubler. pi-2632-060200 ac in dc out d s c topswitch-gx control l + - f x 230 vac 15% 4 adapter 1 85-265 vac 9 w 15 w 6.5 w 10 w 21 w 22 w 11 w 14 w 10 w 22 w 7 w 14 w 13 w 25 w 9 w 15 w 29 w 45 w 17 w 23 w 20 w 45 w 15 w 30 w 16 w 30 w 11 w 20 w 34 w 50 w 20 w 28 w 30 w 65 w 20 w 45 w 37 w 57 w 23 w 33 w 40 w 85 w 26 w 60 w 40 w 64 w 26 w 38 w 60 w 125 w 40 w 90 w 42 w 70 w 28 w 43 w 85 w 165 w 55 w 125 w 43 w 75 w 30 w 48 w 105 w 205 w 70 w 155 w 44 w 79 w 31 w 53 w 120 w 250 w 80 w 180 w 45 w 82 w 32 w 55 w 135 w 290 w 90 w 210 w product highlights lower system cost, high design flexibility extended power range to 290 w features eliminate or reduce cost of external components fully integrated soft-start for minimum stress/overshoot externally programmable accurate current limit ? ider duty cycle for more power, smaller input capacitor separate line sense and current limit pins on y/r/f packages line under-voltage (uv) detection: no turn off glitches line overvoltage (ov) shutdown extends line surge limit line feed forward with maximum duty cycle (dc max ) reduction rejects line ripple and limits dc max at high line frequency jittering reduces emi and emi filtering costs regulates to zero load without dummy loading 132 khz frequency reduces transformer/power supply size half frequency option in y/r/f packages for video applications hysteretic thermal shutdown for automatic fault recovery large thermal hysteresis prevents pc board overheating ecosmart - energy efficient extremely low consumption in remote off mode (80 mw @ 110 vac, 160 mw @ 230 vac) frequency lowered with load for high standby efficiency allows shutdown/wake-up via lan/input port description t opswitch-gx uses the same proven topology as t opswitch , cost effectively integrating the high voltage power mosfet, pwm control, fault protection and other control circuitry onto a single cmos chip. many new functions are integrated to re- duce system cost and improve design flexibility, performance and energy efficiency. depending on package type, the to pswitch-gx family has either 1 or 3 additional pins over the standard drain, source and control terminals allowing the following functions: line sensing (ov/uv, line feedforward/dc max reduction), accu- rate externally set current limit, remote on/off, and synchroni- zation to an external lower frequency and frequency selection (132 khz/66 khz). all package types provide the following transparent features: soft-start, 132 khz switching frequency (automatically reduced at light load), frequency jittering for lower emi, wider dc max , hysteretic thermal shutdown and larger creepage packages. in addition, all critical parameters (i.e. current limit, frequency, pwm gain) have tighter temperature and absolute tolerance, to simplify design and optimize system cost. top242 p or g top242 r top242 y or f top243 p or g top243 r top243 y or f top244 p or g top244 r top244 y or f top245 r top245 y or f top246 r top246 y or f top247 r top247 y or f top248 r top248 y or f top249 r top249 y or f top250 r top250 y or f t op242-250 topswitch - gx family extended power, design flexible, ecosmart , integrated off-line switcher september 2002
t op242-250 2 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 section list functional block diagram ............................................................................................................................... .......... 3 pin functional description ............................................................................................................................... ......... 4 t opswitch-gx family functional description ........................................................................................................ 5 control (c) pin operation ...................................................................................................... ........................... 6 oscillator and switching frequency ............................................................................................. .......................... 6 pulse width modulator and maximum duty cycle ................................................................................... .............. 7 light load frequency reduction ................................................................................................. ........................... 7 error amplifier ................................................................................................................ ......................................... 7 on-chip current limit with external programmability ............................................................................ ................. 7 line under-voltage detection (uv) .............................................................................................. .......................... 8 line overvoltage shutdown (ov) ................................................................................................. .......................... 8 line feed forward with dc max reduction .............................................................................................................. 8 remote on/off and synchronization .............................................................................................. ..................... 9 soft-start ..................................................................................................................... ........................................... 9 shutdown/auto-restart .......................................................................................................... ................................ 9 hysteretic over-temperature protection ......................................................................................... ....................... 9 bandgap reference .............................................................................................................. .................................. 9 high-voltage bias current source ............................................................................................... ......................... 10 using feature pins ............................................................................................................................... ..................... 11 frequency (f) pin operation .................................................................................................... ....................... 11 line-sense (l) pin operation ................................................................................................... ......................... 11 external current limit (x) pin operation ....................................................................................... .......... 11 multi-function (m) pin operation ............................................................................................... ................... 12 t ypical uses of frequency (f) pin ...................................................................................................................... 15 t ypical uses of line-sense (l) and external current limit (x) pins ....................................................... 16 t ypical uses of multi-function (m) pin ............................................................................................................. 19 application examples ............................................................................................................................... ................ 21 a high efficiency, 30 w, universal input power supply .......................................................................... .............. 21 a high efficiency, enclosed, 70 w, universal adapter supply .................................................................... .......... 22 a high efficiency, 250 w, 250 - 380 vdc input power supply ..................................................................... ........ 23 multiple output, 60 w, 185 - 265 vac input power supply ........................................................................ .......... 24 processor controlled supply turn on/off ........................................................................................ .................... 25 key application considerations .............................................................................................................................. 2 7 t opswitch-ii vs. t opswitch-gx ................................................................................................................... ....... 27 t opswitch-fx vs. topswitch-gx .................................................................................................. ..................... 28 t opswitch-gx design considerations ......................................................................................................... ....... 29 t opswitch-gx layout considerations ......................................................................................................... ........ 31 quick design checklist ......................................................................................................... ................................ 31 design tools ................................................................................................................... ...................................... 33 product specifications and test conditions .......................................................................................................... 34 t ypical performance characteristics ...................................................................................................................... 41 part ordering information ............................................................................................................................... ......... 45 package outlines ............................................................................................................................... ....................... 45
t op242-250 3 h 9/02 figure 2a. functional block diagram (y, r or f package). pi-2641-061200 pi-2639-060600 figure 2b. functional block diagram (p or g package). pi-2631-061200 shutdown/ auto-restart pwm comparator clock saw controlled turn-on gate driver current limit comparator internal uv comparator internal supply 5.8 v 4.8 v source (s) s r q d max stop soft- start - + control (c) multi- function (m) - + 5.8 v i fb r e z c v c + - leading edge blanking 8 1 hysteretic thermal shutdown shunt regulator/ error amplifier + - drain (d) on/off soft start dc max v bg dc max v bg + v t 0 ov/uv v i (limit) current limit adjust line sense soft start light load frequency reduction stop logic oscillator with jitter pi-2639-060600 shutdown/ auto-restart pwm comparator clock saw half freq. controlled turn-on gate driver current limit comparator internal uv comparator internal supply 5.8 v 4.8 v source (s) s r q d max stop soft- start - + control (c) line-sense (l) external current limit (x) frequency (f) - + 5.8 v 1 v i fb r e z c v c + - leading edge blanking 8 1 hysteretic thermal shutdown shunt regulator/ error amplifier + - drain (d) on/off soft start dc max v bg dc max v bg + v t 0 ov/uv v i (limit) current limit adjust line sense soft start light load frequency reduction stop logic oscillator with jitter
t op242-250 4 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 pin functional description drain (d) pin: high voltage power mosfet drain output. the internal start-up bias current is drawn from this pin through a switched high-voltage current source. internal current limit sense point for drain current. control (c) pin: error amplifier and feedback current input pin for duty cycle control. internal shunt regulator connection to provide inter- nal bias current during normal operation. it is also used as the connection point for the supply bypass and auto-restart/ compensation capacitor. line-sense (l) pin: (y, r or f package only) input pin for ov, uv, line feed forward with dc max reduction, remote on/off and synchronization. a connection to source pin disables all functions on this pin. external current limit (x) pin: (y, r or f package only) input pin for external current limit adjustment, remote on/off, and synchronization. a connection to source pin disables all functions on this pin. multi-function (m) pin: (p or g package only) this pin combines the functions of the line-sense (l) and external current limit (x) pins of the y package into one pin. input pin for ov, uv, line feed forward with dc max reduction, external current limit adjustment, remote on/off and synchronization. a connection to source pin disables all functions on this pin and makes t opswitch-gx operate in simple three terminal mode (like t opswitch-ii ). figure 3. pin configuration (top view). pi-2509-040501 dc input voltage + - dm s c v uv = i uv x r ls v ov = i ov x r ls for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc dc max @100 vdc = 78% dc max @375 vdc = 38% control r ls 2 m ? pi-2517-040501 dc input voltage + - dm s c for r il = 12 k ? i limit = 69% control r il see fig. 55 for other resistor values (r il ) for r il = 25 k ? i limit = 43% to select different i limit values x pi-2629-040501 dc input voltage + - d s c control l r il r ls 12 k ? 2 m ? v uv = i uv x r ls v ov = i ov x r ls for r ls = 2 m ? dc max @100 vdc = 78% dc max @375 vdc = 38% for r il = 12 k ? i limit = 69% see fig. 55 for other resistor values (r il ) to select different i limit values v uv = 100 vdc v ov = 450 vdc figure 4. y/r/f package line sense and externally set current limit. figure 5. p/g package line sense. figure 6. p/g package externally set current limit. frequency (f) pin: (y, r or f package only) input pin for selecting switching frequency: 132 khz if connected to source pin and 66 khz if connected to control pin. the switching frequency is internally set for fixed 132 khz operation in p and g packages. source (s) pin: output mosfet source connection for high voltage power return. primary side control circuit common and reference point. pi-2724-010802 tab internally connected to source pin y package (to-220-7c) c d s s s s 1 c 3 x 2 l 5 f 4 s 7 d m p package (dip-8b) g package (smd-8b) r package (to-263-7c) f package (to-262-7c) 8 5 7 1 1234 5 7 clxs f d 4 2 3
t op242-250 5 h 9/02 topswitch-gx family functional description like t opswitch , t opswitch-gx is an integrated switched mode power supply chip that converts a current at the control input to a duty cycle at the open drain output of a high voltage power mosfet. during normal operation the duty cycle of the power mosfet decreases linearly with increasing control pin current as shown in figure 7. in addition to the three terminal t opswitch features, such as the high voltage start-up, the cycle-by-cycle current limiting, loop compensation circuitry, auto-restart, thermal shutdown, the t opswitch-gx incorporates many additional functions that reduce system cost, increase power supply performance and design flexibility. a patented high voltage cmos technology allows both the high voltage power mosfet and all the low voltage control circuitry to be cost effectively integrated onto a single monolithic chip. three terminals, frequency, line-sense, and exter- nal current limit (available in y, r or f package) or one terminal multi-function (available in p or g package) have been added to implement some of the new functions. these terminals can be connected to the source pin to operate the t opswitch-gx in a t opswitch -like three terminal mode. however, even in this three terminal mode, the t opswitch-gx offers many new transparent features that do not require any external components: 1. a fully integrated 10 ms soft-start limits peak currents and voltages during start-up and dramatically reduces or eliminates output overshoot in most applications. 2. dc max of 78% allows smaller input storage capacitor, lower input voltage requirement and/or higher power capability. 3. frequency reduction at light loads lowers the switching losses and maintains good cross regulation in multiple output supplies. 4. higher switching frequency of 132 khz reduces the transformer size with no noticeable impact on emi. 5. frequency jittering reduces emi. 6. hysteretic over-temperature shutdown ensures automatic recovery from thermal fault. large hysteresis prevents circuit board overheating. 7. packages with omitted pins and lead forming provide large drain creepage distance. 8. tighter absolute tolerances and smaller temperature vari- ations on switching frequency, current limit and pwm gain. the line-sense (l) pin is usually used for line sensing by connecting a resistor from this pin to the rectified dc high voltage bus to implement line overvoltage (ov), under-voltage (uv) and line feed forward with dc max reduction. in this mode, the value of the resistor determines the ov/uv thresholds and the dc max is reduced linearly starting from a line voltage above the under-voltage threshold. see table 2 and figure 11. the pin can also be used as a remote on/off and a synchronization input. the external current limit (x) pin is usually used to reduce the current limit externally to a value close to the operat- ing peak current, by connecting the pin to source through a resistor. this pin can also be used as a remote on/off and a synchronization input in both modes. see table 2 and figure 11. for the p or g packages the line-sense and external current limit pin functions are combined on one multi- function (m) pin. however, some of the functions become mutually exclusive as shown in table 3. the frequency (f) pin in the y, r or f package sets the switching frequency to the default value of 132 khz when connected to source pin. a half frequency option of 66 khz can be chosen by connecting this pin to control pin instead. leaving this pin open is not recommended. pi-2633-011502 duty cycle (%) i c (ma) top242-5 1.6 2.0 top246-9 2.2 2.6 top250 2.4 2.7 5.2 6.0 5.8 6.6 6.5 7.3 i cd1 i b auto-restart i l = 125 a i l < i l(dc) i l = 190 a 78 10 38 frequency (khz) i c (ma) 30 i cd1 i b auto-restart 132 note: for p and g packages i l is replaced with i m . i l < i l(dc) i l = 125 a slope = pwm gain i l = 190 a figure 7. relationship of duty cycle and frequency to control pin current.
t op242-250 6 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 pi-2545-082299 s1 s2 s6 s7 s1 s2 s6 s7 s0 s1 s7 s0 s0 5.8 v 4.8 v s7 0 v 0 v 0 v v line v c v drain v out note: s0 through s7 are the output states of the auto-restart counter 2 1 2 3 4 0 v ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ s6 s7 ~ ~ ~ ~ ~ ~ ~ ~ v uv ~ ~ ~ ~ ~ ~ ~ ~ s2 ~ ~ control (c) pin operation the control pin is a low impedance node that is capable of receiving a combined supply and feedback current. during normal operation, a shunt regulator is used to separate the feed- back signal from the supply current. control pin voltage v c is the supply voltage for the control circuitry including the mosfet gate driver. an external bypass capacitor closely connected between the control and source pins is required to supply the instantaneous gate drive current. the total amount of capacitance connected to this pin also sets the auto-restart timing as well as control loop compensation. when rectified dc high voltage is applied to the drain pin during start-up, the mosfet is initially off, and the control pin capacitor is charged through a switched high voltage current source connected internally between the drain and control pins. when the control pin voltage v c reaches approximately 5.8 v, the control circuitry is activated and the soft-start begins. the soft-start circuit gradually increases the duty cycle of the mosfet from zero to the maxi- mum value over approximately 10 ms. if no external feedback/ supply current is fed into the control pin by the end of the soft-start, the high voltage current source is turned off and the control pin will start discharging in response to the supply current drawn by the control circuitry. if the power supply is designed properly, and no fault condition such as open loop or shorted output exists, the feedback loop will close, providing external control pin current, before the control pin voltage has had a chance to discharge to the lower threshold voltage of approximately 4.8 v (internal supply under-voltage lockout threshold). when the externally fed current charges the control pin to the shunt regulator voltage of 5.8 v, cur- rent in excess of the consumption of the chip is shunted to source through resistor r e as shown in figure 2. this current flowing through r e controls the duty cycle of the power mosfet to provide closed loop regulation. the shunt regulator has a finite low output impedance z c that sets the gain of the error amplifier when used in a primary feedback configuration. the dynamic impedance z c of the control pin together with the external control pin capacitance sets the dominant pole for the control loop. when a fault condition such as an open loop or shorted output prevents the flow of an external current into the control pin, the capacitor on the control pin discharges towards 4.8 v. at 4.8 v, auto-restart is activated which turns the output mosfet off and puts the control circuitry in a low current standby mode. the high-voltage current source turns on and charges the external capacitance again. a hysteretic internal supply under-voltage comparator keeps v c within a window of typically 4.8 v to 5.8 v by turning the high-voltage current source on and off as shown in figure 8. the auto-restart circuit has a divide-by-eight counter which prevents the out- put mosfet from turning on again until eight discharge/charge cycles have elapsed. this is accomplished by enabling the output mosfet only when the divide-by-eight counter reaches full count (s7). the counter effectively limits t opswitch-gx power dissipation by reducing the auto-restart duty cycle to typically 4%. auto-restart mode continues until output voltage regulation is again achieved through closure of the feedback loop. oscillator and switching frequency the internal oscillator linearly charges and discharges an internal capacitance between two voltage levels to create a sawtooth waveform for the pulse width modulator. this figure 8. typical waveforms for (1) power up (2) normal operation (3) auto-restart (4) power down.
t op242-250 7 h 9/02 figure 9. switching frequency jitter (idealized v drain waveform). oscillator sets the pulse width modulator/current limit latch at the beginning of each cycle. the nominal switching frequency of 132 khz was chosen to minimize transformer size while keeping the fundamental emi frequency below 150 khz. the frequency pin (available only in y, r or f package), when shorted to the control pin, lowers the switching frequency to 66 khz (half frequency) which may be preferable in some cases such as noise sensitive video applications or a high efficiency standby mode. other- wise, the frequency pin should be connected to the source pin for the default 132 khz. to further reduce the emi level, the switching frequency is jittered (frequency modulated) by approximately 4 khz at 250 hz (typical) rate as shown in figure 9. figure 46 shows the typical improvement of emi measurements with frequency jitter. pulse width modulator and maximum duty cycle the pulse width modulator implements voltage mode control by driving the output mosfet with a duty cycle inversely proportional to the current into the control pin that is in excess of the internal supply current of the chip (see figure 7). the excess current is the feedback error signal that appears across r e (see figure 2). this signal is filtered by an rc network with a typical corner frequency of 7 khz to reduce the effect of switching noise in the chip supply current generated by the mosfet gate driver. the filtered error signal is compared with the internal oscillator sawtooth waveform to generate the duty cycle waveform. as the control current increases, the duty cycle decreases. a clock signal from the oscillator sets a latch which turns on the output mosfet. the pulse width modulator resets the latch, turning off the output mosfet. note that a minimum current must be driven into the control pin before the duty cycle begins to change. the maximum duty cycle, dc max , is set at a default maximum value of 78% (typical). however, by connecting the line- sense or multi-function pin (depending on the package) to the rectified dc high voltage bus through a resistor with appropriate value, the maximum duty cycle can be made to decrease from 78% to 38% (typical) as shown in figure 11 when input line voltage increases (see line feed forward with dc max reduction). light load frequency reduction the pulse width modulator duty cycle reduces as the load at the power supply output decreases. this reduction in duty cycle is proportional to the current flowing into the control pin. as the control pin current increases, the duty cycle decreases linearly towards a duty cycle of 10%. below 10% duty cycle, to maintain high efficiency at light loads, the frequency is also reduced linearly until a minimum frequency is reached at a duty cycle of 0% (refer to figure 7). the minimum frequency is typically 30 khz and 15 khz for 132 khz and 66 khz operation, respectively. this feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. error amplifier the shunt regulator can also perform the function of an error amplifier in primary side feedback applications. the shunt regulator voltage is accurately derived from a temperature- compensated bandgap reference. the gain of the error ampli- fier is set by the control pin dynamic impedance. the control pin clamps external circuit signals to the v c voltage level. the control pin current in excess of the supply current is separated by the shunt regulator and flows through r e as a voltage error signal. on-chip current limit with external programmability the cycle-by-cycle peak drain current limit circuit uses the out- put mosfet on-resistance as a sense resistor. a current limit comparator compares the output mosfet on-state drain to source voltage, v ds(on) with a threshold voltage. high drain current causes v ds(on) to exceed the threshold voltage and turns the output mosfet off until the start of the next clock cycle. the current limit comparator threshold voltage is temperature compensated to minimize the variation of the current limit due to temperature related changes in r ds(on) of the output mosfet. the default current limit of t opswitch-gx is preset internally. however, with a resistor connected between external current limit (x) pin (y, r or f package) or multi- function (m) pin (p or g package) and source pin, current limit can be programmed externally to a lower level between 30% and 100% of the default current limit. please refer to the graphs in the typical performance characteristics section for the selection of the resistor value. by setting current limit low, a larger t opswitch-gx than necessary for the power required can be used to take advantage of the lower r ds(on) for higher efficiency/smaller heat sinking requirements. with a second resistor connected between the external pi-2550-092499 128 khz 4 ms time switching frequency v drain 136 khz
t op242-250 8 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 figure 10. synchronization timing diagram. pi-2637-060600 oscillator (saw) d max enable from x, l or m pin (stop) time current limit (x) pin (y, r or f package) or multi- function (m) pin (p or g package) and the rectified dc high voltage bus, the current limit is reduced with increasing line voltage, allowing a true power limiting operation against line variation to be implemented. when using an rcd clamp, this power limiting technique reduces maximum clamp voltage at high line. this allows for higher reflected voltage designs as well as reducing clamp dissipation. the leading edge blanking circuit inhibits the current limit comparator for a short time after the output mosfet is turned on. the leading edge blanking time has been set so that, if a power supply is designed properly, current spikes caused by primary-side capacitances and secondary-side rectifier reverse recovery time should not cause premature termination of the switching pulse. the current limit is lower for a short period after the leading edge blanking time as shown in figure 52. this is due to dynamic characteristics of the mosfet. to avoid triggering the current limit in normal operation, the drain current wave- form should stay within the envelope shown. line under-voltage detection (uv) at power up, uv keeps t opswitch-gx off until the input line voltage reaches the under voltage threshold. at power down, uv prevents auto-restart attempts after the output goes out of regulation. this eliminates power down glitches caused by the slow discharge of large input storage capacitor present in applications such as standby supplies. a single resistor connected from the line-sense pin (y, r or f package) or multi-function pin (p or g package) to the rectified dc high voltage bus sets uv threshold during power up. once the power supply is successfully turned on, the uv threshold is lowered to 40% of the initial uv threshold to allow extended input voltage operating range (uv low threshold). if the uv low threshold is reached during operation without the power supply losing regulation the device will turn off and stay off until uv (high threshold) has been reached again. if the power supply loses regulation before reaching the uv low threshold, the device will enter auto-restart. at the end of each auto- restart cycle (s7), the uv comparator is enabled. if the uv high threshold is not exceeded the mosfet will be disabled during the next cycle (see figure 8). the uv feature can be disabled independent of ov feature as shown in figures 19 and 23. line overvoltage shutdown (ov) the same resistor used for uv also sets an overvoltage thresh- old which, once exceeded, will force t opswitch-gx output into off-state. the ratio of ov and uv thresholds is preset at 4.5 as can be seen in figure 11. when the mosfet is off, the rectified dc high voltage surge capability is increased to the voltage rating of the mosfet (700 v), due to the absence of the reflected voltage and leakage spikes on the drain. a small amount of hysteresis is provided on the ov threshold to prevent noise triggering. the ov feature can be disabled independent of the uv feature as shown in figures 18 and 32. line feed forward with dc max reduction the same resistor used for uv and ov also implements line voltage feed forward which minimizes output line ripple and reduces power supply output sensitivity to line transients. this feed forward operation is illustrated in figure 7 by the different values of i l (y, r or f package) or i m (p or g pack- age). note that for the same control pin current, higher line voltage results in smaller operating duty cycle. as an added feature, the maximum duty cycle dc max is also reduced from 78% (typical) at a voltage slightly higher than the uv thresh- old to 30% (typical) at the ov threshold (see figures 7 and 1 1). limiting dc max at higher line voltages helps
t op242-250 9 h 9/02 prevent transformer saturation due to large load transients in forward converter applications. dc max of 38% at the ov thresh- old was chosen to ensure that the power capability of the t opswitch-gx is not restricted by this feature under normal operation. remote on/off and synchronization t opswitch-gx can be turned on or off by controlling the current into the line-sense pin or out from the external current limit pin (y, r or f package) and into or out from the multi-function pin (p or g package) (see figure 11). in addition, the line-sense pin has a 1 v threshold compara- tor connected at its input. this voltage threshold can also be used to perform remote on/off control. this allows easy implemen- tation of remote on/off control of t opswitch-gx in several different ways. a transistor or an optocoupler output connected between the external current limit or line-sense pins (y, r or f package) or the multi-function pin (p or g package) and the source pin implements this function with ?ctive-on?(figures 22, 29 and 36) while a transistor or an optocoupler output connected between the line-sense pin (y, r or f package) or the multi-function (p or g package) pin and the control pin implements the function with ?ctive-off?(figures 23 and 37). when a signal is received at the line-sense pin or the external current limit pin (y, r or f package) or the multi-function pin (p or g package) to disable the output through any of the pin functions such as ov, uv and remote on/off, t opswitch-gx always completes its current switching cycle, as illustrated in figure 10, before the output is forced off. the internal oscillator is stopped slightly before the end of the current cycle and stays there as long as the disable signal exists. when the signal at the above pins changes state from disable to enable, the internal oscillator starts the next switching cycle. this approach allows the use of these pins to synchronize t opswitch-gx to any external signal with a frequency between its internal switching frequency and 20 khz. as seen above, the remote on/off feature allows the t opswitch-gx to be turned on and off instantly, on a cycle- by-cycle basis, with very little delay. however, remote on/off can also be used as a standby or power switch to turn off the t opswitch-gx and keep it in a very low power consumption state for indefinitely long periods. if the t opswitch-gx is held in remote off state for long enough time to allow the control pin to dishcharge to the internal supply under-voltage threshold of 4.8 v (approximately 32 ms for a 47 f control pin capacitance), the control pin goes into the hysteretic mode of regulation. in this mode, the control pin goes through alternate charge and discharge cycles between 4.8 v and 5.8 v (see control pin operation section above) and runs entirely off the high voltage dc input, but with very low power consumption (160 mw typical at 230 vac with m or x pins open). when the t opswitch-gx is remotely turned on after entering this mode, it will initiate a normal start-up sequence with soft-start the next time the control pin reaches 5.8 v. in the worst case, the delay from remote on to start-up can be equal to the full discharge/charge cycle time of the control pin, which is approximately 125 ms for a 47 f control pin capacitor. this reduced consumption remote off mode can eliminate expensive and unreliable in-line mechanical switches. it also allows for microprocessor controlled turn-on and turn-off sequences that may be required in certain applications such as inkjet and laser printers. soft-start t wo on-chip soft-start functions are activated at start-up with a duration of 10 ms (typical). maximum duty cycle starts from 0% and linearly increases to the default maximum of 78% at the end of the 10 ms duration and the current limit starts from about 85% and linearly increases to 100% at the end of the 10ms duration. in addition to start-up, soft-start is also activated at each restart attempt during auto-restart and when restarting after being in hysteretic regulation of control pin voltage (v c ), due to remote off or thermal shutdown conditions. this effectively minimizes current and voltage stresses on the output mosfet, the clamp circuit and the output rectifier during start-up. this feature also helps minimize output overshoot and prevents saturation of the transformer during start-up. shutdown/auto-restart to minimize to pswitch-gx power dissipation under fault conditions, the shutdown/auto-restart circuit turns the power supply on and off at an auto-restart duty cycle of typically 4% if an out of regulation condition persists. loss of regulation interrupts the external current into the control pin. v c regu- lation changes from shunt mode to the hysteretic auto-restart mode as described in control pin operation section. when the fault condition is removed, the power supply output becomes regulated, v c regulation returns to shunt mode, and normal operation of the power supply resumes. hysteretic over-temperature protection t emperature protection is provided by a precision analog circuit that turns the output mosfet off when the junction temperature exceeds the thermal shutdown temperature (140 c typical). when the junction temperature cools to below the hysteretic temperature, normal operation resumes providing automatic recovery. a large hysteresis of 70 c (typical) is provided to prevent overheating of the pc board due to a continuous fault condition. v c is regulated in hyster- etic mode and a 4.8 v to 5.8 v (typical) sawtooth waveform is present on the control pin while in thermal shutdown. bandgap reference all critical t opswitch-gx internal voltages are derived from a temperature-compensated bandgap reference. this reference
t op242-250 10 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 is also used to generate a temperature-compensated current reference which is trimmed to accurately set the switching frequency, mosfet gate drive current, current limit, and the line ov/uv thresholds. t opswitch-gx has improved circuitry to maintain all of the above critical parameters within very tight absolute and temperature tolerances. high-voltage bias current source this current source biases t opswitch-gx from the drain pin and charges the control pin external capacitance during start-up or hysteretic operation. hysteretic operation occurs during auto-restart, remote off and over-temperature shutdown. in this mode of operation, the current source is switched on and off with an effective duty cycle of approxi- mately 35%. this duty cycle is determined by the ratio of control pin charge (i c ) and discharge currents (i cd1 and i cd2 ). this current source is turned off during normal operation when the output mosfet is switching. the effect of the current source switching will be seen on the drain voltage waveform as small disturbances and is normal.
t op242-250 11 h 9/02 frequency (f) pin operation the frequency pin is a digital input pin available in the y, r or f package only. shorting the frequency pin to source pin selects the nominal switching frequency of 132 khz (figure 13) which is suited for most applications. for other cases that may benefit from lower switching frequency such as noise sensitive video applications, a 66 khz switching frequency (half frequency) can be selected by shorting the frequency pin to the control pin (figure 14). in addition, an example circuit shown in figure 15 may be used to lower the switching frequency from 132 khz in normal operation to 66 khz in standby mode for very low standby power consumption. line-sense (l) pin operation (y, r and f packages) when current is fed into the line-sense pin, it works as a voltage source of approximately 2.6 v up to a maximum current of +400 a (typical). at +400 a, this pin turns into a constant current sink. refer to figure 12a. in addition, a comparator with a threshold of 1 v is connected at the pin and is used to detect when the pin is shorted to the source pin. there are a total of four functions available through the use of the line-sense pin: ov, uv, line feed forward with dc max reduction, and remote on/off. connecting the line-sense pin to the source pin disables all four functions. the line- sense pin is typically used for line sensing by connecting a resistor from this pin to the rectified dc high voltage bus to imple- ment ov, uv and dc max reduction with line voltage. in this mode, the value of the resistor determines the line ov/uv thresh- olds, and the dc max is reduced linearly with rectified dc high voltage starting from just above the uv threshold. the pin can also be used as a remote on/off and a synchronization input. refer to table 2 for possible combinations of the f unctions with using feature pins ? ?? ??? ?? ??? ? ??? ? ?? ?? ?? ? ????? ? 16 17 18 19 20 21 22 23 24 25 26 27 28 29 t able 2. typical line-sense and external current limit pin configurations. *this table is only a partial list of many line-sense and external current limit pin configurations that are possible. figure number three terminal operation under-voltage overvoltage line feed forward (dc max ) overload power limiting external current limit remote on/off example circuits shown in figure 16 through figure 40. a description of specific functions in terms of the line-sense pin i/v characteristic is shown in figure 11 (right hand side). the horizontal axis represents line-sense pin current with positive polarity indicating currents flowing into the pin. the meaning of the vertical axes varies with functions. for those that control the on/off states of the output such as uv, ov and remote on/off, the vertical axis represents the enable/ disable states of the output. uv triggers at i uv (+50 a typical with 30 a hysteresis) and ov triggers at i ov (+225 a typical with 8 a hysteresis). between the uv and ov thresh- olds, the output is enabled. for line feed forward with dc max reduction, the vertical axis represents the magnitude of the dc max . line feed forward with dc max reduction lowers maximum duty cycle from 78% at i l(dc) (+60 a typical) to 38% at i ov (+225 a). external current limit (x) pin operation (y, r and f packages) when current is drawn out of the external current limit pin, it works as a voltage source of approximately 1.3 v up to a maximum current of ?40 a (typical). at ?40 a, it turns into a constant current source (refer to figure 12a). there are two functions available through the use of the external current limit pin: external current limit and remote on/off. connecting the external current limit pin and source pin disables the two functions. in high efficiency applications this pin can be used to reduce the current limit externally to a value close to the operating peak current, by connecting the pin to the source pin through a resistor. the pin can also be used for remote on/off. table 2 shows several possible combinations using this pin. see line-sense and external current limit pin table*
t op242-250 12 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 ? ?? ? ?? ? ?? ? ?? ?? ?? ? ? ? t able 3. typical multi-function pin configurations. multi-function pin table* 30 31 32 33 34 35 36 37 38 39 40 figure number three terminal operation under-voltage overvoltage line feed forward (dc max ) overload power limiting external current limit remote on/off figure 11 for a description of the functions where the horizon- tal axis (left hand side) represents the external current limit pin current. the meaning of the vertical axes varies with function. for those that control the on/off states of the output such as remote on/off, the vertical axis represents the enable/disable states of the output. for external current limit, the vertical axis represents the magnitude of the i limit . please see graphs in the typical performance characteristics section for the current limit programming range and the selection of appropriate resistor value. multi-function (m) pin operation (p and g packages) the line-sense and external current limit pin functions are combined to a single multi-function pin for p and g packages. the comparator with a 1 v threshold at the line-sense pin is removed in this case as shown in figure 2b. all of the other functions are kept intact. however, since some of the functions require opposite polarity of input current (multi-function pin), they are mutually exclusive. for example, line sensing features cannot be used simultaneously with external current limit setting. when current is fed into the multi-function pin, it works as a voltage source of approximately 2.6 v up to a maximum current of +400 a (typical). at +400 a, this pin turns into a constant current sink. when current is drawn out of the multi- function pin, it works as a voltage source of approximately 1.3 v up to a maximum current of ?40 a (typical). at ?40 a, it turns into a constant current source. refer to figure 12b. there are a total of five functions available through the use of the multi-function pin: ov, uv, line feed forward with dc max reduction, external current limit and remote on/off. a short circuit between the multi-function pin and source pin disables all five functions and forces t opswitch-gx to operate in a simple three terminal mode like t opswitch-ii . the multi-function pin is typically used for line sensing by connecting a resistor from this pin to the rectified dc high voltage bus to implement ov, uv and dc max reduction with line voltage. in this mode, the value of the resistor determines the line ov/uv thresholds, and the dc max is reduced linearly with rectified dc high voltage starting from just above the uv threshold. in high efficiency applications this pin can be used in the external current limit mode instead, to reduce the current limit externally to a value close to the operating peak current, by connecting the pin to the source pin through a resistor. the same pin can also be used as a remote on/off and a synchronization input in both modes. please refer to table 3 for possible combinations of the functions with example circuits shown in figure 30 through figure 40. a description of specific functions in terms of the multi- function pin i/v characteristic is shown in figure 11. the horizontal axis represents multi-function pin current with positive polarity indicating currents flowing into the pin. the meaning of the vertical axes varies with functions. for those that control the on/off states of the output such as uv, ov and remote on/off, the vertical axis represents the enable/ disable states of the output. uv triggers at i uv (+50 a typical) and ov triggers at i ov (+225 a typical with 30 a hysteresis). between the uv and ov thresholds, the output is enabled. for external current limit and line feed forward with dc max reduction, the vertical axis represents the magnitude of the i limit and dc max . line feed forward with dc max reduction lowers maximum duty cycle from 78% at i m(dc) (+60 a typical) to 38% at i ov (+225 a). external current limit is available only with negative multi-function pin current. please see graphs in the typical performance characteristics section for the current limit programming range and the selection of appropriate resistor value. *this table is only a partial list of many multi-function pin configurations that are possible.
t op242-250 13 h 9/02 figure 11. multi-function (p or g package), line-sense, and external current limit (y, r or f package) pin characteristics. -250 -200 -150 -100 -50 0 50 100 150 200 250 300 350 400 pi-2636-010802 output mosfet switching (enabled) (disabled) i limit (default) dc max (78.5%) current limit m pin l pin x pin maximum duty cycle v bg -22 a -27 a v bg + v tp i i i i i uv i rem(n) i ov pin voltage note: this figure provides idealized functional characteristics with typical performance values. please refer to the parametric table and typical performance characteristics sections of the data sheet for measured data. x and l pins (y, r or f package) and m pin (p or g package) current ( a) disabled when supply output goes out of regulation
t op242-250 14 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 figure 12a. line-sense (l), and external current limit (x) pin input simplified schematic. figure 12b. multi-function (m) pin input simplified schematic. v bg + v t 1 v v bg 240 a 400 a control pin y, r and f package (voltage sense) (positive current sense - under-voltage, overvoltage, on/off maximum duty cycle reduction) (negative current sense - on/off, current limit adjustment) pi-2634-010802 topswitch-gx line-sense (l) external current limit (x) v bg + v t v bg 240 a 400 a control pin multi-function (m) (positive current sense - under-voltage, overvoltage, maximum duty cycle reduction) (negative current sense - on/off, current limit adjustment) pi-2548-092399 topswitch-gx p and g package
t op242-250 15 h 9/02 figure 15. half frequency standby mode (for high standby efficiency). figure 13. full frequency operation (132 khz). figure 14. half frequency operation (66 khz). t ypical uses of frequency (f) pin pi-2654-071700 dc input voltage + - d s c control f pi-2655-071700 dc input voltage + - d s c control f pi-2656-040501 dc input voltage + - d s c standby q s can be an optocoupler output. control f 20 k ? r hf 1 nf q s 47 k ?
t op242-250 16 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 t ypical uses of line-sense (l) and external current limit (x) pins xf pi-2617-050100 dc input voltage + - d cs d s c control l clxs f d pi-2618-040501 dc input voltage + - d s c control l 2m ? r ls v uv = i uv x r ls v ov = i ov x r ls for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc dc max @100 vdc = 78% dc max @375 vdc = 38% pi-2510-040501 dc input voltage + - dm s c v uv = r ls x i uv for value shown v uv = 100 vdc r ls 6.2 v 2 m ? 22 k ? control pi-2620-040501 dc input voltage + - d s c control l 2 m ? 30 k ? r ls 1n4148 v ov = i ov x r ls for values shown v ov = 450 vdc x pi-2623-040501 dc input voltage + - d s c r il for r il = 12 k ? i limit = 69% see fig. 55 for other resistor values (r il ) for r il = 25 k ? i limit = 43% control x pi-2624-040501 dc input voltage + - d s c 2.5 m ? r ls 6 k ? r il 100% @ 100 vdc 63% @ 300 vdc i limit = i limit = control figure 16. three terminal operation (line-sense and external current limit features disabled. frequency pin can be tied to source or control pin). figure 17. line-sensing for under-voltage, overvoltage and line feed forward. figure 18. line-sensing for under-voltage only (overvoltage disabled). figure 19. line-sensing for overvoltage only (under-voltage disabled). maximum duty cycle will be reduced at low line. figure 20. externally set current limit. figure 21. current limit reduction with line voltage.
t op242-250 17 h 9/02 t ypical uses of line-sense (l) and external current limit (x) pins (cont.) figure 22. active-on (fail safe) remote on/off. x pi-2625-040501 dc input voltage + - d s c on/off 47 k ? q r can be an optocoupler output or can be replaced by a manual switch. q r control x on/off 47 k ? pi-2626-040501 dc input voltage + - d s c r il q r 12 k ? for r il = i limit = 69 % 25 k ? for r il = i limit = 43 % q r can be an optocoupler output or can be replaced by a manual switch. control pi-2627-040501 dc input voltage + - d s c control l 47 k ? q r r mc 45 k ? q r can be an optocoupler output or can be replaced by a manual switch. on/off x r il pi-2622-040501 dc input voltage + - d s c control l 47 k ? 2 m ? q r r ls on/off for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc q r can be an optocoupler output or can be replaced by a manual switch. x on/off 47 k ? pi-2628-040501 dc input voltage + - d s c control l r il r ls q r 2 m ? v uv = i uv x r ls v ov = i ov x r ls dc max @100 vdc = 78% dc max @375 vdc = 38% 12 k ? for r il = i limit = 69 % q r can be an optocoupler output or can be replaced by a manual switch. figure 23. active-off remote on/off. maximum duty cycle will be reduced. figure 24. active-on remote on/off with externally set current limit. figure 25. active-off remote on/off with externally set current limit. figure 26. active-off remote on/off with line-sense. figure 27. active-on remote on/off with line-sense and external current limit. pi-2621-040501 dc input voltage + - d s c control l 47 k ? q r r mc 45 k ? q r can be an optocoupler output or can be replaced by a manual switch. on/off
t op242-250 18 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 t ypical uses of line-sense (l) and external current limit (x) pins (cont.) figure 28. line-sensing and externally set current limit. pi-2640-040501 dc input voltage + - d s c control l on/off 47 k ? q r can be an optocoupler output or can be replaced by a manual switch. 300 k ? q r figure 29. active-on remote on/off. x pi-2629-040501 dc input voltage + - d s c control l r il r ls 12 k ? 2 m ? v uv = i uv x r ls v ov = i ov x r ls for r ls = 2 m ? dc max @100 vdc = 78% dc max @375 vdc = 38% for r il = 12 k ? i limit = 69% see fig. 55 for other resistor values (r il ) to select different i limit values v uv = 100 vdc v ov = 450 vdc
t op242-250 19 h 9/02 figure 32. line sensing for under-voltage only (overvoltage disabled). pi-2510-040501 dc input voltage + - dm s c v uv = r ls x i uv for value shown v uv = 100 vdc r ls 6.2 v 2 m ? 22 k ? control figure 33. line sensing for overvoltage only (under-voltage disabled). maximum duty cycle will be reduced at low line. figure 34. externally set current limit. pi-2517-040501 dc input voltage + - dm s c for r il = 12 k ? i limit = 69% control r il see fig. 55 for other resistor values (r il ) for r il = 25 k ? i limit = 43% to select different i limit values pi-2516-040501 dc input voltage + - dm s c v ov = i ov x r ls for values shown v ov = 450 vdc control r ls 1n4148 2 m ? 30 k ? figure 30. three terminal operation (multi-function features disabled). pi-2508-081199 dc input voltage + - d s c control m c ds cd s s ss m pi-2509-040501 dc input voltage + - dm s c v uv = i uv x r ls v ov = i ov x r ls for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc dc max @100 vdc = 78% dc max @375 vdc = 38% control r ls 2 m ? t ypical uses of multi-function (m) pin figure 35. current limit reduction with line voltage. pi-2518-040501 dc input voltage + - dm s c control r il r ls 2.5 m ? 6 k ? 100% @ 100 vdc 63% @ 300 vdc i limit = i limit = figure 31. line sensing for undervoltage, over-voltage and line feed forward.
t op242-250 20 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 pi-2522-040501 dc input voltage + - d s c r mc 45 k ? m control q r q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? figure 37. active-off remote on/off. maximum duty cycle will be reduced. figure 36. active-on (fail safe) remote on/off. pi-2519-040501 dc input voltage + - d s c q r on/off m control q r can be an optocoupler output or can be replaced by a manual switch. 47 k ? pi-2523-040501 dc input voltage + - d s c r ls m for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc control q r 2 m ? q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? figure 40. active-off remote on/off with line-sense. figure 39. active-off remote on/off with externally set current limit. pi-2521-040501 dc input voltage + - d s c r il r mc 24 k ? 12 k ? m control q r 2r il r mc = q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? figure 38. active-on remote on/off with externally set current limit. pi-2520-040501 dc input voltage + - d s c q r r il m control 12 k ? for r il = i limit = 69 % q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? 25 k ? for r il = i limit = 43 % t ypical uses of multi-function (m) pin (cont.)
t op242-250 21 h 9/02 figure 41. 30 w power supply using external current limit programming and line sensing for uv and ov. application examples a high efficiency, 30 w, universal input power supply the circuit shown in figure 41 takes advantage of several of the t opswitch-gx features to reduce system cost and power supply size and to improve efficiency. this design delivers 30 w at 12 v, from an 85 to 265 vac input, at an ambient of 50 c, in an open frame configuration. a nominal efficiency of 80% at full load is achieved using top244y. the current limit is externally set by resistors r1 and r2 to a value just above the low line operating peak drain current of approximately 70% of the default current limit. this allows use of a smaller transformer core size and/or higher transformer primary inductance for a given output power, reducing to pswitch-gx power dissipation, while at the same time avoiding transformer core saturation during startup and output transient conditions. the resistors r1 & r2 provide a signal that reduces the current limit with increasing line voltage, which in turn limits the maximum overload power at high input line voltage. this function in combination with the built-in soft- start feature of t opswitch-gx , allows the use of a low cost rcd clamp (r3, c3 and d1) with a higher reflected voltage, by safely limiting the t opswitch-gx drain voltage, with adequate margin under worst case conditions. resistor r4 provides line sensing, setting uv at 100 vdc and ov at 450 vdc. the extended maximum duty cycle feature of t opswitch-gx (guaranteed minimum value of 75% vs. 64% for t opswitch-ii ) allows the use of a smaller input capacitor (c1). the extended maximum duty cycle and the higher reflected voltage possible with the rcd clamp also permit the use of a higher primary to secondary turns ratio for t1 which reduces the peak reverse voltage experienced by the secondary rectifier d8. as a result a 60 v schottky rectifier can be used for up to 15 v outputs, which greatly improves power supply efficiency. the frequency reduction feature of the t opswitch-gx eliminates the need for any dummy loading for regulation at no load and reduces the no load/standby consumption of the power supply. frequency jitter provides improved margin for conducted emi meeting the cispr 22 (fcc b) specification. output regulation is achieved by using a simple zener sense circuit for low cost. the output voltage is determined by the zener diode (vr2) voltage and the voltage drops across the optocoupler (u2) led and resistor r6. resistor r8 provides bias current to zener vr2 for typical regulation of 5% at the 12 v output level, over line and load and component variations. 12 v @ 2.5 a d2 1n4148 t1 c5 47 f 10 v u2 ltv817a vr2 1n5240c 10 v, 2% r6 150 ? r15 150 ? c14 1 nf d1 uf4005 r3 68 k ? 2 w c3 4.7 nf 1 kv cy1 2.2 nf u1 top244y dl sxf c r8 150 ? c1 68 f 400 v c6 0.1 f d8 mbr1060 c10 560 f 35 v c12 220 f 35 v c11 560 f 35 v rtn r5 6.8 ? r1 4.7 m ? 1/2 w r4 2 m ? 1/2 w r2 9.09 k ? pi-2657-040501 l3 3.3 h br1 600 v 2a f1 3.15 a j1 l1 20 mh l n cx1 100 nf 250 vac control control topswitch-gx performance summary output power: 30 w regulation: 4% efficiency: 79% ripple: 50 mv pk-pk 85-265 vac
t op242-250 22 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 a high efficiency, enclosed, 70 w, universal adapter supply the circuit shown in figure 42 takes advantage of several of the t opswitch-gx features to reduce cost, power supply size and increase efficiency. this design delivers 70 w at 19 v, from an 85 to 265 vac input, at an ambient of 40 c, in a small sealed adapter case (4?x 2.15?x 1?. full load efficiency is 85% at 85 v ac rising to 90% at 230 vac input. due to the thermal environment of a sealed adapter a top249y is used to minimize device dissipation. resistors r9 and r10 externally program the current limit level to just above the operating peak drain current at full load and low line. this allows the use of a smaller transformer core size without saturation during startup or output load transients. resistors r9 and r10 also reduce the current limit with increasing line voltage, limiting the maximum overload power at high input line voltage, removing the need for any protection circuitry on the secondary. resistor r11 implements an under voltage and over voltage sense as well as providing line feed forward for reduced output line frequency ripple. with resistor r11 set at 2 m ? the power supply does not start operating until the dc rail voltage reaches 100 vdc. on removal of the ac input the uv sense prevents the output glitching as c1 discharges, turning off the t opswitch-gx when the output regulation is lost or when the input voltage falls to below 40 v, whichever occurs first. this same value of r11 sets the ov threshold to 450 v. if exceeded, for example during a line surge, t opswitch-gx stops switching for the duration of the surge extending the high voltage withstand to 700 v without device figure 42. 70 w power supply using current limit reduction with line and line sensing for uv and ov. damage. capacitor c11 has been added in parallel with vr1 to reduce zener clamp dissipation. with a switching frequency of 132 khz a pq26/20 core can be used to provide 70 w. to maximize efficiency, by reducing winding losses, two output windings are used each with their own dual 100 v schottky rectifier (d2 and d3). the frequency reduction feature of the t opswitch-gx eliminates any dummy loading to maintain regulation at no-load and reduces the no-load consumption of the power supply to only 520 mw at 230 vac input. frequency jittering provides conducted emi meeting the cispr 22 (fcc b) / en55022b specification, using simple filter compo- nents (c7, l2, l3 and c6) even with the output earth grounded. to regulate the output an optocoupler (u2) is used with a secondary reference sensing the output voltage via a resistor divider (u3, r4, r5, r6). diode d4 and c15 filter and smooth the output of the bias winding. capacitor c15 (1 f) prevents the bias voltage from falling during zero to full load transients. resistor r8 provides filtering of leakage inductance spikes keeping the bias voltage constant even at high output loads. resistor r7, c9 and c10 together with c5 and r3 provide loop compensation. due to the large primary currents, all the small signal control components are connected to a separate source node that is kelvin connected to the source pin of the t opswitch-gx . for improved common mode surge immunity the bias winding common re- turns directly to the dc bulk capacitor (c1). 19 v @ 3.6 a top249y u1 u3 tl431 u2 pc817a dl sxf c rtn l2 820 h 2 a c6 0.1 f x2 f1 3.15 a 85-265 vac br1 rs805 8 a 600 v l3 75 h 2 a t t1 c13 0.33 f 400 v c12 0.022 f 400 v c11 0.01 f 400 v rt1 10 ? 1.7 a pi-2691-033001 j1 l n control control topswitch-gx c1 150 f 400 v c5 47 f 16 v c3 820 f 25 v l1 200 h c2 820 f 25 v c14 0.1 f 50 v c4 820 f 25 v c10 0.1 f 50 v c9 4.7 nf 50 v c8 0.1 f 50 v vr1 p6ke- 200 d2 mbr20100 c7 2.2 nf y1 safety d3 mbr20100 d4 1n4148 r11 2 m ? 1/2 w r9 13 m ? r8 4.7 ? r1 270 ? r2 1 k ? r13 562 ? 1% r4 31.6 k ? 1% r7 56 k ? r10 20.5 k ? r3 6.8 ? r6 4.75 k ? 1% c15 1 f 50 v d1 uf4006 performance summary output power: 70 w regulation: 4% efficiency: 84% ripple: < 120 mv pk-pk no load consumption: < 0.52 w @ 230 vac
t op242-250 23 h 9/02 a high efficiency, 250 w, 250 ?380 vdc input power supply the circuit shown in figure 43 delivers 250 w (48 v @ 5.2 a) at 84% efficiency using a top249 from a 250 to 380 vdc input. dc input is shown, as typically at this power level a p.f.c. boost stage would preceed this supply, providing the dc input (c1 is included to provide local decoupling). flyback topology is still useable at this power level due to the high output voltage, keeping the secondary peak currents low enough so that the output diode and capacitors are reasonably sized. in this example the top249 is at the upper limit of its power capability and the current limit is set to the internal maximum by connecting the x pin to source. however, line sensing is implemented by connecting a 2 m ? resistor from the l pin to the dc rail. if the dc input rail rises above 450 vdc, then t opswitch-gx will stop switching until the voltage returns to normal, preventing device damage. due to the high primary current, a low leakage inductance transformer is essential. therefore, a sandwich winding with a copper foil secondary was used. even with this technique the leakage inductance energy is beyond the power capability of a simple zener clamp. therefore, r2, r3 and c6 are added in parallel to vr1. these have been sized such that during normal operation very little power is dissipated by vr1, the leakage energy instead being dissipated by r2 and r3. however, vr1 is essential to limit the peak drain voltage during start-up and/or overload conditions to below the 700 v rating of the t opswitch-gx mosfet. the secondary is rectifed and smoothed by d2 and c9, c10 and c11. three capacitors are used to meet the secondary ripple current requirement. inductor l2 and c12 provide switching noise filtering. a simple zener sensing chain regulates the output voltage. the sum of the voltage drop of vr2, vr3 and vr4 plus the led drop of u2 gives the desired output voltage. resistor r6 limits led current and sets overall control loop dc gain. diode d4 and c14 provide secondary soft-finish, feeding current into the control pin prior to output regulation and thus ensuring that the output voltage reaches regulation at start- up under low line, full load conditions. resistor r9 provides a discharge path for c14. capacitor c13 and r8 provide control loop compensation and are required due to the gain associated with such a high output voltage. sufficient heat sinking is required to keep the t opswitch-gx device below 110 c when operating under full load, low line and maximum ambient temperature. airflow may also be required if a large heat sink area is not acceptable. figure 43. 250 w, 48 v power supply using top249. 48 v @ 5.2 a +250 - 380 vdc 0v l d sxf c rtn pi-2692-033001 all resistor 1/8 w 5% unless otherwise stated. control topswitch-gx c1 22 f 400 v c3 0.1 f 50 v r4 6.8 ? r6 100 ? r8 56 ? r9 10 k ? c3 47 f 10 v c6 4.7 nf 1 kv c13 150 nf 63 v c4 1 f 50 v c14 22 f 63 v c9 560 f 63 v c10 560 f 63 v c11 560 f 63 v c12 68 f 63 v c7 2.2 nf y1 l2 3 h 8a d2 mur1640ct d2 1n4148 u2 ltv817a d1 byv26c t1 r1 2 m ? 1/2 w r3 68 k ? 2 w r2 68 k ? 2 w vr1 p6ke200 vr2 22 v bzx79b22 vr3 12 v bzx79b12 vr4 12 v bzx79b12 control d4 1n4148 performance summary output power: 250 w line regulation: 1% load regulation: 5% efficiency: 85% ripple: < 100 mv pk-pk no load consumption: 1.4 w (300 vdc) top249y u1
t op242-250 24 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 multiple output, 60 w, 185-265 vac input power supply figure 44 shows a multiple output supply typical for high end set-top boxes or cable decoders containing high capacity hard disks for recording. the supply delivers an output power of 45 w cont./60 w peak (thermally limited) from an input voltage of 185 to 265 vac. efficiency at 45 w, 185 vac is 75%. the 3.3 v and 5 v outputs are regulated to 5% without the need for secondary linear regulators. dc stacking (the secondary winding reference for the other output voltages is connected to the cathode of d10 rather than the anode) is used to minimize the voltage error for the higher voltage outputs. due to the high ambient operating temperature requirement typical of a set-top box (60 c) the top246y is used to reduce conduction losses and minimize heat sink size. resis- tor r2 sets the device current limit to 80% of typical to limit overload power. the line sense resistor (r1) protects the t opswitch-gx from line surges and transients by sensing when the dc rail voltage rises to above 450 v. in this condition the t opswitch-gx stops switching, extending the input voltage withstand to 496 vac which is ideal for countries with poor power quality. a thermistor (rt1) is used to prevent premature failure of the fuse by limiting the inrush current (due to the relatively large size of c2). an optional mov (rv1) extends the differential surge protection to 6 kv from 4 kv. leakage inductance clamping is provided by vr1, r5 and c5, keeping the drain voltage below 700 v under all conditions. resistor r5 and capacitor c5 are selected such that vr1 dissipates very little power except during overload conditions. the frequency jittering feature of t opswitch-gx allows the circuit shown to meet cispr22b with simple emi filtering (c1, l1 and c6) and the output grounded. the secondaries are rectified and smoothed by d7 to d11, c7, c9, c11, c13, c14, c16 and c17. diode d11 for the 3.3 v output is a schottky diode to maximize efficiency. diode d10 for the 5 v output is a pn type to center the 5 v output at 5 v. the 3.3 v and 5 v output require two capacitors in parallel to meet the ripple current requirement. switching noise filtering is provided by l2 to l5 and c8, c10, c12, c15 and c18. resistor r6 prevents peak charging of the lightly loaded 30 v output. the outputs are regulated using a secondary reference (u3). both the 3.3 v and 5 v outputs are sensed via r11 and r10. resistor r8 provides bias for u3 and r7 sets the overall dc gain. resistor r9, c19, r3 and c4 provide loop compen- sation. a soft-finish capacitor (c20) eliminates output overshoot. figure 44. 60 w multiple output power supply using top246. d6 1n4148 d7 uf4003 d8 uf5402 d9 uf5402 d11 mbr1045 d10 byv32-200 t1 u2 ltv817 u3 tl431 c20 22 f 10 v r7 150 ? r12 10 k c19 0.1 f r11 9.53 k ? r10 15.0 k ? r9 3.3 k ? r8 1 k ? c6 2.2 nf y1 c7 47 f 50 v c9 330 f 25 v c11 390 f 35 v c14 1000 f 25 v 30 v @ 0.03 a 18 v @ 0.5 a 12 v @ 0.6 a 5 v @ 3.2 a 3.3 v @ 3 a rtn d1-d4 1n4007 v f1 3.15 a rv1 275 v 14 mm j1 l1 20 mh 0.8a t l n r3 6.8 ? c5 47 f 10 v top246y u1 dl s c topswitch-gx r1 2 m ? 1/2 w r5 68 k ? 2 w r6 10 ? rt1 10 ? 1.7 a c2 68 f 400 v c5 1 nf 400 v c3 1 f 50 v c1 0.1 f x1 pi-2693-033001 control control c3 0.1 f 50 v xf d6 1n4937 vr1 p6ke170 c16 1000 f 25 v c13 1000 f 25 v c17 1000 f 25 v c15 220 f 165 v c18 220 f 16 v c12 100 f 25 v c10 100 f 25 v c8 10 f 50 v l2 3.3 h 3a l3 3.3 h 3a l4 3.3 h 5a l5 3.3 h 5a performance summary output power: 45 w cont./60 w peak regulation: 3.3 v: 5% 5 v: 5% 12 v: 7% 18 v: 7% 30 v: 8% efficiency: 75% no load consumption: 0.6 w 185-265 vac .r2 9.08 k ?
t op242-250 25 h 9/02 processor controlled supply turn on/off a low cost momentary contact switch can be used to turn the t opswitch-gx power on and off under microprocessor control that may be required in some applications such as printers. the low power remote off feature allows an elegant implementation of this function with very few external components as shown in figure 45. whenever the push button momentary contact switch p1 is closed by the user, the optocoupler u3 is activated to inform the microprocessor of this action. initially, when the power supply is off (m pin is floating), closing of p1 turns the power supply on by shorting the m pin of the t opswitch-gx to source through a diode (remote on). when the secondary output voltage vcc is established, the microprocessor comes alive and recognizes that the switch p1 is closed through the switch status input that is driven by the optocoupler u3 output. the microprocessor then sends a power supply control signal to hold the power supply in the on-state through the optocoupler u4. if the user presses the switch p1 again to command a turn off, the microprocessor detects this through the optocoupler u3 and initiates a shut- down procedure that is product specific. for example, in the case of the inkjet printer, the shutdown procedure may include safely parking the print heads in the storage position. in the case of products with a disk drive, the shutdown procedure may include saving data or settings to the disk. after the shut- down procedure is complete, when it is safe to turn off the power supply, the microprocessor releases the m pin by turning the optocoupler u4 off. if the manual switch and the optocouplers u3 and u4 are not located close to the m pin, a capacitor c m may be needed to prevent noise coupling to the pin when it is open. the power supply could also be turned on remotely through a local area network or a parallel or serial port by driving the optocoupler u4 input led with a logic signal. sometimes it is easier to send a train of logic pulses through a cable (due to ac coupling of cable, for example) instead of a dc logic level as a wake up signal. in this case, a simple rc filter can be used to generate a dc level to drive u4 (not shown in figure 45). this remote on feature can be used to wake up peripherals such as printers, scanners, external modems, disk drives, etc., as needed from a computer. peripherals are usually designed to turn off automatically if they are not being used for a period of time, to save power. u1 u2 u4 u3 c m p1 p1 switch status power supply on/off control external wake-up signal pi-2561-033001 v cc (+5 v) return control micro processor/ controller logic input logic output high voltage dc input + - topswitch-gx dm sf c 1n4148 u4 ltv817a 6.8 k ? 1 nf 100 k ? 6.8 k ? u3 ltv817a 27 k ? 1n4148 47 f figure 45. remote on/off using microcontroller.
t op242-250 26 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 in addition to using a minimum number of components, t opswitch-gx provides many technical advantages in this type of application: 1. extremely low power consumption in the off mode: 80 mw typical at 110 vac and 160 mw typical at 230 vac. this is because in the remote/off mode the topswitch-gx consumes very little power, and the external circuitry does not consume any current (either m, l or x pin is open) from the high voltage dc input. 2. a very low cost, low voltage/current, momentary contact switch can be used. 3. no debouncing circuitry for the momentary switch is required. during turn-on, the start-up time of the power supply (typically 10 to 20 ms) plus the microprocessor initiation time act as a debouncing filter, allowing a turn-on only if the switch is depressed firmly for at least the above delay time. during turn-off, the microprocessor initiates the shutdown sequence when it detects the first closure of the switch, and subsequent bouncing of the switch has no effect. if necessary, the microprocessor could implement the switch debouncing in software during turn-off, or a filter capacitor can be used at the switch status input. 4. no external current limiting circuitry is needed for the operation of the u4 optocoupler output due to internal limiting of m pin current. 5. no high voltage resistors to the input dc voltage rail are required to power the external circuitry in the primary. even the led current for u3 can be derived from the control pin. this not only saves components and simplifies layout, but also eliminates the power loss associated with the high voltage resistors in both on and off states. 6. robust design: there is no on/off latch that can be accidentally triggered by transients. instead, the power supply is held in the on-state through the secondary side microprocessor.
t op242-250 27 h 9/02 key application considerations topswitch-ii vs. topswitch-gx t able 4 compares the features and performance differences between t opswitch - gx and t opswitch-ii . many of the new features eliminate the need for additional discrete components. other features increase the robustness of design allowing cost savings in the transformer and other power components. function topswitch-ii topswitch-gx figures topswitch-gx advantages soft-start n/a* 10 ms limits peak current and voltage component stresses during start-up eliminates external components used for soft-start in most applications reduces or eliminates output overshoot external current limit n/a* programmable 11,20,21, smaller transformer 100% to 30% of 24,25,27, higher efficiency default current 28,34,35, allows power limiting (constant over- limit 38,39 load power independent of line voltage allows use of larger device for lower losses, higher efficiency and smaller heatsink dc max 67% 78% 7 smaller input cap (wider dynamic range) higher power capability (when used with rcd clamp for large v or ) allows use of schottky secondary rectifier diode for up to 15 v output for high efficiency line feed forward with n/a* 78% to 38% 7,11,17, rejects line ripple dc max reduction 26,27,28, 31,40 line ov shutdown n/a* single resistor 11,17,19, increases voltage withstand cap- programmable 26,27,28, ability against line surge 31,33,40 line uv detection n/a* single resistor 11,17,18, prevents auto-restart glitches programmable 26,27,28, during power down 31,32,40 switching frequency 100 khz 10% 132 khz 6% 13,15 smaller transformer below start of conducted emi limits switching frequency n/a* 66 khz 7% 14,15 lower losses when using rc and option (y, r and f rcd snubber for noise reduction in packages) video applications allows for higher efficiency in standby mode lower emi (second harmonic below 150 khz) frequency jitter n/a* 4 khz@132 khz 9,46 reduces conducted emi 2 khz@66 khz frequency reduction n/a* at a duty cycle 7 zero load regulation without dummy below 10% load low power consumption at no load t able 4. comparison between topswitch-ii and topswitch-gx. (continued on next page) *not available
t op242-250 28 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 t able 4 (cont). comparison between topswitch-ii and topswitch-gx. *not available function topswitch-fx topswitch-gx topswitch-gx advantages light load operation cycle skipping frequency and duty cycle improves light load efficiency reduction reduces no-load consumption line sensing/externally line sensing and line sensing and externally additional design flexibility allows all set current limit externally set set current limit possible features to be used simultaneously (y, r and f packages) current limit simultaneously mutually (functions split onto exclusive (m pin) l and x pins) current limit 100-40% 100-30% minimizes transformer core size programming in highly continuous designs range topswitch-fx vs. topswitch-gx t able 5 compares the features and performance differences between t opswitch - gx and t opswitch-fx . many of the new features eliminate the need for additional discrete components. other features increase the robustness of design allowing cost savings in the transformer and other power components. function topswitch-ii topswitch-gx figures topswitch-gx advantages remote on/off n/a* single transistor 11, 22, fast on/off (cycle by cycle) or optocoupler 23, 24, active-on or active-off control interface or manual 25, 26, low consumption in remote off state switch 27, 29, active-on control for fail-safe 36, 37, eliminates expensive in-line on/off 38, 39, switch 40 allows processor controlled turn on/off permits shutdown/wake-up of peripherals via lan or parallel port synchronization n/a* single transistor synchronization to external lower or optocoupler frequency signal interface starts new switching cycle on demand thermal shutdown 125 c min. hysteretic 130 c automatic recovery from thermal latched min. shutdown (with fault 75 c hysteresis) large hysteresis prevents circuit board overheating current limit tolerance 10% (@25 c) 7% (@25 c) 10% higher power capability due to -8% (0 c to100 c) -4% (0 c to 100 c) tighter tolerance drain dip 0.037" / 0.94 mm 0.137" / 3.48 mm greater immunity to arcing as a creepage smd 0.037" / 0.94 mm 0.137" / 3.48 mm result of build-up of dust, debris and at package to-220 0.046" / 1.17 mm 0.068" / 1.73 mm other contaminants drain creepage at 0.045" / 1.14 mm 0.113" / 2.87 mm preformed leads accommodate pcb for y, r and f (r and f (preformed leads) large creepage for pcb layout packages package n/a*) easier to meet safety (ul/vde) t able 5. comparison between topswitch-fx and topswitch-gx. (continued on next page)
t op242-250 29 h 9/02 t able 5 (cont). comparison between topswitch-fx and topswitch-gx. *not available topswitch-gx design considerations power table data sheet power table (table 1) represents the maximum practi- cal continuous output power based on the following conditions: t op242 to top246: 12 v output, schottky output diode, 150 v reflected voltage (v or ) and efficiency estimates from curves con- tained in application note an-29. top247 to top250: higher output voltages, with a maximum output current of 6 a. for all devices, a 100 vdc minimum for 85-265 vac and 250 vdc minimum for 230 vac are assumed and sufficient heat sinking to keep device temperature 100 c. power levels shown in the power table for the r package device assume 6.45 cm 2 of 610 g/m 2 copper heat sink area in an enclosed adapter, or 19.4 cm 2 in an open frame. topswitch-gx selection selecting the optimum t opswitch - gx depends upon required maximum output power, efficiency, heat sinking constraints and cost goals. with the option to externally reduce current limit, a larger t opswitch - gx may be used for lower power applications where higher efficiency is needed or minimal heat sinking is available. function topswitch-fx topswitch-gx topswitch-gx advantages p/g package current identical to y top243p or g and matches device current limit to limits packages top244p or g internal package dissipation capability current limits reduced allows more continuous design to lower device dissipation (lower rms currents) y/r/f package current 100% (r and f 90% (for equivalent r ds (on) ) minimizes transformer core size limits package n/a*) optimizes efficiency for most applications thermal shutdown 125 c min. 130 c min. 75 c allows higher output powers in 70 c hysteresis hysteresis high ambient temperature applications maximum duty cycle 90 a 60 a reduces output line frequency reduction threshold ripple at low line ? max reduction optimized for forward design line under-voltage n/a* 40% of positive (turn-on) provides a well defined turn-off negative (turn-off) threshold threshold as the line voltage falls threshold soft-start 10 ms (duty cycle) 10 ms (duty cycle + current gradually increasing current limit limit) in addition to duty cycle during soft- start further reduces peak current and voltage further reduces component stresses during start up input capacitor the input capacitor must be chosen to provide the minimum dc voltage required for the t opswitch - gx converter to maintain regulation at the lowest specified input voltage and maximum output power. since t opswitch - gx has a higher dc max than t opswitch-ii , it is possible to use a smaller input capacitor. for t opswitch - gx, a capacitance of 2 f per watt is possible for universal input with an appropriately designed transformer. primary clamp and output reflected voltage v or a primary clamp is necessary to limit the peak t opswitch - gx drain to source voltage. a zener clamp requires few parts and takes up little board space. for good efficiency, the clamp zener should be selected to be at least 1.5 times the output reflected voltage v or as this keeps the leakage spike conduc- tion time short. when using a zener clamp in a universal input application, a v or of less than 135 v is recommended to allow for the absolute tolerances and temperature variations of the zener. this will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated breakdown voltage of the t opswitch - gx mosfet.
t op242-250 30 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 figure 46b. topswitch-gx full range emi scan (132 khz, with jitter) with identical circuitry and conditions. a high v or is required to take full advantage of the wider dc max of to pswitch - gx. an rcd clamp provides tighter clamp voltage tolerance than a zener clamp and allows a v or as high as 150 v. rcd clamp dissipation can be minimized by reducing the external current limit as a function of input line voltage (see figure 21 and 35). the rcd clamp is more cost effective than the zener clamp but requires more careful design (see quick design checklist). output diode the output diode is selected for peak inverse voltage, output current, and thermal conditions in the application (including heatsinking, air circulation, etc.). the higher dc max of t opswitch - gx along with an appropriate transformer turns ratio can allow the use of a 60 v schoktty diode for higher efficiency on output voltages as high as 15 v (see figure 41. a 12 v, 30 w design using a 60 v schottky for the output diode). bias winding capacitor due to the low frequency operation at no-load a 1 f bias winding capacitor is recommended. soft-start generally a power supply experiences maximum stress at start-up before the feedback loop achieves regulation. for a period of 10 ms the on-chip soft-start linearly increases the duty cycle from zero to the default dc max at turn on. in addition, the primary current limit increases from 85% to 100% over the same period. this causes the output voltage to rise in an orderly manner allowing time for the feedback loop to take control of the duty cycle. this reduces the stress on the t opswitch-gx mosfet, clamp circuit and output diode(s), and helps prevent transformer saturation during start-up. also soft-start limits the amount of output voltage overshoot, and in many applications eliminates the need for a soft-finish capacitor. emi the frequency jitter feature modulates the switching frequency over a narrow band as a means to reduce conducted emi peaks associated with the harmonics of the fundamental switching frequency. this is particularly beneficial for average detection mode. as can be seen in figure 46, the benefits of jitter increase with the order of the switching harmonic due to an increase in frequency deviation. the frequency pin of t opswitch - gx offers a switching frequency option of 132 khz or 66 khz. in applications that require heavy snubbers on the drain node for reducing high frequency radiated noise (for example, video noise sensitive applications such as vcr, dvd, monitor, tv, etc.), operating at 66 khz will reduce snubber loss resulting in better efficiency. also, in applications where transformer size is not a concern, use of the 66 khz option will provide lower emi and higher efficiency. note that the second harmonic of 66 khz is still below 150 khz, above which the conducted emi specifications get much tighter. for 10 w or below, it is possible to use a simple inductor in place of a more costly ac input common mode choke to meet worldwide conducted emi limits. transformer design it is recommended that the transformer be designed for maximum operating flux density of 3000 gauss and a peak flux density of 4200 gauss at maximum current limit. the turns ratio should be chosen for a reflected voltage (v or ) no greater than 135 v when using a zener clamp, or 150 v (max) when using rcd clamp with current limit reduction with line voltage (overload protection). for designs where operating current is significantly lower than the default current limit, it is recommended to use an externally set current limit close to the operating peak current to reduce peak flux density and peak power (see figures 20 and 34). in most applications, the tighter current limit tolerance, higher en55022b (qp) en55022b (av) -20 -10 0 -10 20 30 40 50 60 70 80 0.15 1 10 30 frequency (mhz) amplitude (db v) pi-2577-010600 topswitch-gx (with jitter) figure 46a. topswitch-ii full range emi scan (100 khz, no jitter). -20 -10 0 -10 20 30 40 50 60 70 80 0.15 1 10 30 frequency (mhz) amplitude (db v) pi-2576-010600 en55022b (qp) en55022b (av) topswitch-ii (no jitter)
t op242-250 31 h 9/02 switching frequency and soft-start features of t opswitch-gx contribute to a smaller transformer when compared to t opswitch-ii. standby consumption frequency reduction can significantly reduce power loss at light or no load, especially when a zener clamp is used. for very low secondary power consumption use a tl431 regulator for feedback control. alternately, switching losses can be significantly reduced by changing from 132 khz in normal operation to 66 khz under light load conditions. topswitch-gx layout considerations as t opswitch-gx has additional pins and operates at much higher power levels compared to previous t opswitch families, the following guidelines should be carefully followed. primary side connections use a single point (kelvin) connection at the negative terminal of the input filter capacitor for t opswitch-gx source pin and bias winding return. this improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. the control pin bypass capacitor should be located as close as possible to the source and control pins and its source connection trace should not be shared by the main mosfet switching currents. all source pin referenced components connected to the multi-function, line- sense or external current limit pins should also be located closely between their respective pin and source. once again the source connection trace of these components should not be shared by the main mosfet switching currents. it is very critical that source pin switching currents are returned to the input capacitor negative terminal through a seperate trace that is not shared by the components connected to control, multi-function, line-sense or external current limit pins. this is because the source pin is also the controller ground reference pin. any traces to the m, l or x pins should be kept as short as possible and away from the drain trace to prevent noise coupling. line-sense resistor (r1 in figures 47-49) should be located close to the m or l pin to minimize the trace length on the m or l pin side. in addition to the 47 f control pin capacitor, a high frequency bypass capacitor in parallel may be used for better noise immunity. the feedback optocoupler output should also be located close to the control and source pins of t opswitch-gx. y-capacitor the y-capacitor should be connected close to the secondary output return pin(s) and the positive primary dc input pin of the transformer. heat sinking the tab of the y package (to-220) or f package (to-262) is internally electrically tied to the source pin. to avoid circu- lating currents, a heat sink attached to the tab should not be electrically tied to any primary ground/source nodes on the pc board. when using a p (dip-8), g (smd-8) or r (to-263) package, a copper area underneath the package connected to the source pins will act as an effective heat sink. on double sided boards (figure 49), top side and bottom side areas connected with vias can be used to increase the effective heat sinking area. in addition, sufficient copper area should be provided at the anode and cathode leads of the output diode(s) for heat sinking. in figures 47, 48 and 49 a narrow trace is shown between the output rectifier and output filter capacitor. this trace acts as a thermal relief between the rectifier and filter capacitor to prevent excessive heating of the capacitor. quick design checklist as with any power supply design, all t opswitch-gx designs should be verified on the bench to make sure that components specifications are not exceeded under worst case conditions. the following minimum set of tests is strongly recommended: 1. maximum drain voltage ?verify that peak v ds does not exceed 675 v at highest input voltage and maximum over- load output power. maximum overload output power occurs when the output is overloaded to a level just before the power supply goes into auto-restart (loss of regulation). 2. maximum drain current ?at maximum ambient tempera- ture, maximum input voltage and maximum output load, verify drain current waveforms at start-up for any signs of transformer saturation and excessive leading edge current spikes. t opswitch-gx has a leading edge blanking time of 220 ns to prevent premature termination of the on-cycle. v erify that the leading edge current spike is below the allowed current limit envelope (see figure 52) for the drain current waveform at the end of the 220 ns blanking period. 3. thermal check ?at maximum output power, minimum input voltage and maximum ambient temperature, verify that temperature specifications are not exceeded for t opswitch-gx , transformer, output diodes and output capacitors. enough thermal margin should be allowed for
t op242-250 32 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 figure 47. layout considerations for topswitch-gx using p or g packages. figure 48. layout considerations for topswitch-gx using y or f package. + - input filter capacitor heat sink safety spacing opto- coupler + - dc out output filter capacitor t r a n s f o r m e r sec d l c maximize hatched copper areas ( ) for optimum heat sinking y1- capacitor pi-2669-042301 top view topswitch-gx hv r1 x output rectifier top view pi-2670-042301 y1- capacitor opto- coupler d + - hv r2 + - dc out input filter capacitor output filter capacitor output rectifier safety spacing t r a n s f o r m e r maximize hatched copper areas ( ) for optimum heat sinking s pri pri sec s s s c bias bias m r1 topswitch-gx
t op242-250 33 h 9/02 the part-to-part variation of the r ds(on) of t opswitch-gx as specified in the data sheet. the margin required can either be calculated from the tolerances or it can be accounted for by connecting an external resistance in series with the drain pin and attached to the same heatsink, having a resistance value that is equal to the difference between the measured r ds(on) of the device under test and the worst case maximum specification. figure 49. layout considerations for topswitch-gx using r package. - hv + - dc out pi-2734-043001 t r a n s f o r m e r safety spacing y1- capacitor solder side component side opto- coupler + output filter capacitors maximize hatched copper areas( ) for optimum heat sinking top view input filter capacitor r1a - 1c pri pri sec bias topswitch-gx s l c x d design tools for a discussion on utilizing t opswitch-gx in a forward converter configuration, please refer to the t opswitch-gx forward design methodology application note. up-to-date information on design tools can be found at the power integrations web site: www.powerint.com
t op242-250 34 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 absolute maximum ratings (1) drain voltage ............................................ -0.3 to 700 v drain peak current: top242 ............................... 0.72 a top243 ............................... 1.44 a top244 ............................... 2.16 a top245 ............................... 2.88 a top246 ............................... 4.32 a top247 ............................... 5.76 a top248 ............................... 7.20 a top249 ............................... 8.64 a top250 ............................. 10.08 a control voltage .......................................... -0.3 to 9 v i c = 3 ma; t j = 25 c i c = i cd1 f osc dc (onset ) f osc (dmin) ? f f m dc max control functions conditions (unless otherwise specified) see figure 53 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units thermal impedance khz % khz khz hz % thermal impedance: y or f package: ( ja ) (1) ....................................... 70 c/w ( jc ) (2) ......................................... 2 c/w p or g package: ( ja ) ...................... 45 c/w (3) ; 35 c/w (4) ( jc ) (5) ....................................... 11 c/w r package: ( ja ) ... 80 c/w (7) ; 37 c/w (4) ; 27 c/w (6) ( jc ) (5) ......................................... 2 c/w notes: 1. free standing with no heatsink. 2. measured at the back surface of tab. 3. soldered to 0.36 sq. inch (232 mm 2 ), 2 oz. (610 gm/m 2 ) copper clad. 4. soldered to 1 sq. inch (645 mm 2 ), 2 oz. (610 gm/m 2 ) copper clad. 5. measured on the source pin close to plastic interface. 6. soldered to 3 sq. inch (1935 mm 2 ), 2 oz. (610 gm/m 2 ) copper clad. 7. soldered to foot print area, 2 oz. (610 gm/m 2 ) copper clad. 124 132 140 61.5 66 70.5 10 30 15 4 2 250 75 78 83 28 38 50 frequency pin connected to source frequency pin connected to control 132 khz operation 66 khz operation i l i l (dc) or i m i m(dc) i l or i m = 190 a switching frequency (average) duty cycle at onset of fre- quency reduction switching frequency near 0% duty cycle frequency jitter deviation frequency jitter modulation rate maximum duty cycle 132 khz operation 66 khz operation control current ............................................... 100 ma line sense pin voltage ................................ -0.3 to 9 v current limit pin voltage ..................... -0.3 to 4.5 v multi-function pin voltage .................... -0.3 to 9 v frequency pin voltage ............................... -0.3 to 9 v storage temperature ..................................... -65 to 150 c operating junction temperature (2) ............... -40 to 150 c lead temperature (3) ............................................... 260 c notes: 1. all voltages referenced to source, t a = 25 c. 2. normally limited by internal circuitry. 3. 1/16" from case for 5 seconds.
t op242-250 35 h 9/02 control functions conditions (unless otherwise specified) see figure 53 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units see note a see figure 7 t j = 25 c i c = 4 ma; t j = 25 c see figure 51 l b l c(off) z c pwm gain temperature drift external bias current control current at 0% duty cycle dynamic impedance dynamic impedance temperature drift control pin internal filter pole %/ma/ c ma ma ? %/ c khz shutdown/auto-restart v c = 0 v v c = 5 v l c (ch) v c(ar)u v c(ar)l v c(ar)hyst dc (ar) f (ar) control pin charging current charging current temperature drift auto-restart upper threshold voltage auto-restart lower threshold voltage auto-restart hysteresis voltage auto-restart duty cycle auto-restart frequency ma %/ c v v v % hz -5.0 -3.5 -2.0 -3.0 -1.8 -0.6 0.5 5.8 4.5 4.8 5.1 0.8 1.0 48 1.0 t j = 25 c see note a soft start time t soft t j = 25 c; dc min to dc max 10 15 ms pwm gain dc reg i c = 4 ma; t j = 25 c -28 -23 -18 %/ma top242-245 top246-249 top250 top242-245 top246-249 top250 -0.01 1.2 2.0 3.0 1.6 2.6 4.0 1.7 2.7 4.2 6.0 7.0 6.6 8.0 7.3 8.5 10 15 22 0.18 7
t op242-250 36 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 conditions (unless otherwise specified) see figure 53 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units a a a a v a a a a v v v a %/ a ma 44 50 54 30 210 225 240 8 0.5 1.0 1.6 -35 -27 -20 5 300 400 520 -300 -240 -180 -110 -90 -70 1.90 2.50 3.00 2.30 2.90 3.30 1.26 1.33 1.40 1.18 1.24 1.30 1.24 1.31 1.39 1.13 1.19 1.25 40 60 75 0.25 0.6 1.0 1.0 1.6 t j = 25 c t j = 25 c threshold hysteresis t j = 25 c threshold hysteresis line under-voltage threshold current and hysteresis (m or l pin) line over-voltage or remote on/ off threshold current and hys- teresis (m or l pin) l pin voltage threshold remote on/off negative threshold current and hyster- esis (m or x pin) l or m pin short circuit current x or m pin short circuit current l or m pin voltage (positive current) x pin voltage (negative current) m pin voltage (negative current) maximum duty cycle reduction onset threshold current maximum duty cycle reduction slope remote off drain supply current threshold hysteresis multi-function (m), line-sense (l) and external current limit (x) inputs l or m pin shorted to control v l , v m = v c normal mode auto-restart mode l l or l m = 50 a l l or l m = 225 a l x = -50 a l x = -150 a l m = -50 a l m = -150 a l uv i ov v l(th) i rem (n) i l (sc) or i m (sc) i x (sc) or i m (sc) v l , v m v x v m i l (dc) or i m (dc) i d(rmt) v x , v m = 0 v x, l or m pin floating t j = 25 c i l > i l(dc) or i m > i m (dc) see figure 70 v drain = 150 v t j = 25 c
t op242-250 37 h 9/02 i limit i init a a conditions (unless otherwise specified) see figure 53 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units circuit protection frequency input frequency pin threshold voltage frequency pin input current v f = v c v f i f self protection current limit (see note c) initial current limit see note b 2.9 v 10 40 100 a multi-function (m), line-sense (l) and external current limit (x) inputs remote on delay remote off setup time t r(on) t r(off) from remote on to drain turn-on see note b minimum time before drain turn-on to disable cycle see note b 2.5 s 2.5 s top242 p/g top242 y/r/f t j = 25 c top243 p/g t j = 25 c top243 y/r/f t j = 25 c top244 p/g t j = 25 c top244 y/r/f t j = 25 c top245 y/r/f t j = 25 c top246 y/r/f t j = 25 c top247 y/r/f t j = 25 c top248 y/r/f t j = 25 c top249 y/r/f t j = 25 c top250 y/r/f t j = 25 c 85 vac (rectified line input) 265 vac (rectified line input) internal di/dt=90 ma/ s internal di/dt=150 ma/ s internal di/dt=180 ma/ s internal di/dt=200 ma/ s internal di/dt=270 ma/ s internal di/dt=360 ma/ s internal di/dt=540 ma/ s internal di/dt=720 ma/ s internal di/dt=900 ma/ s internal di/dt=1080 ma/ s internal di/dt=1260 ma/ s 0.418 0.45 0.481 0.697 0.75 0.802 0.837 0.90 0.963 0.930 1.00 1.070 1.256 1.35 1.445 1.674 1.80 1.926 2.511 2.70 2.889 3.348 3.60 3.852 4.185 4.50 4.815 5.022 5.40 5.778 5.859 6.30 6.741 0.75 x i limit(min) 0.6 x i limit(min) see note b
t op242-250 38 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 conditions (unless otherwise specified) see figure 53 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units output circuit protection t il(d) v c(reset) 100 130 140 150 75 1.75 3.0 4.25 ns c c v current limit delay thermal shutdown temperature thermal shutdown hysteresis power-up reset threshold voltage i c = 4 ma figure 53, s1 open r ds(on) on-state resistance t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c top242 i d = 50 ma top243 i d = 100 ma top244 i d = 150 ma top245 i d = 200 ma top246 i d = 300 ma top247 i d = 400 ma top248 i d = 500 ma top249 i d = 600 ma top250 i d = 700 ma 15.6 18.0 25.7 30.0 7.80 9.00 12.9 15.0 5.20 6.00 8.60 10.0 3.90 4.50 6.45 7.50 2.60 3.00 4.30 5.00 1.95 2.25 3.22 3.75 1.56 1.80 2.58 3.00 1.30 1.50 2.15 2.50 1.10 1.28 1.85 2.15 ? off-state current breakdown voltage i dss bv dss 470 a 700 v v l , v m = floating; i c = 4 ma v ds = 560 v; t j = 125 c v l , v m = floating; i c = 4ma see note d, t j = 25 c leading edge blanking time t leb 220 ns see figure 52 t j = 25 c, i c = 4 ma
t op242-250 39 h 9/02 conditions (unless otherwise specified) see figure 53 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units supply voltage characteristics 36 5.60 5.85 6.10 50 1.0 1.6 2.5 1.2 2.2 3.2 1.3 2.4 3.65 0.3 0.6 1.3 v v ppm/ c ma v c(shunt) l cd1 l cd2 see note e i c = 4 ma output mosfet disabled v x , v l , v m = 0 v notes: a. for specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature, and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. b. guaranteed by characterization. not tested in production. c. for externally adjusted current limit values, please refer to figure 55 (current limit vs. external current limit resistance) in the typical performance characteristics section. d. breakdown voltage may be checked against minimum bv dss specification by ramping the drain pin voltage up to but not exceeding minimum bv dss . e. it is possible to start up and operate topswitch-gx at drain voltages well below 36 v. however, the control pin charging current is reduced, which affects start-up time, auto-restart frequency, and auto-restart duty cycle. refer to figure 67, the characteristic graph on control pin charge current (i c ) vs. drain voltage for low voltage operation characteristics. drain supply voltage shunt regulator voltage shunt regulator temperature drift control supply/ discharge current output mosfet enabled v x , v l , v m = 0 v top242-245 top246-249 top250 output rise time fall time t r t f measured in a typical flyback converter application 100 ns 50 ns
t op242-250 40 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 figure 51. control pin i-v characteristic. figure 50. duty cycle measurement. figure 52. drain current operating envelope. figure 53. topswitch-gx general test circuit. pi-2631-010802 5-50 v 5-50 v s4 40 v 0-15 v 0.1 f 47 f 470 ? 5 w y, r or f package (x and l pin) p or g package (m pin) 470 ? 0-100 k ? 0-60 k ? 0-60 k ? 0-100 k ? notes: 1. this test circuit is not applicable for current limit or output characteristic measurements. 2. for p and g packages, short all source pins together. d s fx c l m c control topswitch-gx s2 s1 s5 s3 pi-2039-033001 drain voltage hv 0 v 90% 10% 90% t 2 t 1 d = t 1 t 2 0.8 1.3 1.2 1.1 0.9 0.8 1.0 0 012 6 8 3 time ( s) drain current (normalized) pi-2022-033001 45 7 0.7 0.6 0.5 0.4 0.3 0.2 0.1 i limit(max) @ 25 c i limit(min) @ 25 c i init(min) @ 85 vac i init(min) @ 265 vac t leb (blanking time) 120 100 80 40 20 60 0 0246810 control pin voltage (v) control pin current (ma) 1 slope dynamic impedance = pi-1939-091996
t op242-250 41 h 9/02 the following precautions should be followed when testing t opswitch-gx by itself outside of a power supply. the sche- matic shown in figure 53 is suggested for laboratory testing of t opswitch-gx . when the drain pin supply is turned on, the part will be in the auto-restart mode. the control pin voltage will be oscillating at a low frequency between 4.8 and 5.8 v and the drain is turned on every eighth cycle of the control pin oscillation. if the control pin power supply is turned on bench test precautions for evaluation of electrical characteristics t ypical performance characteristics while in this auto-restart mode, there is only a 12.5% chance that the control pin oscillation will be in the correct state (drain active state) so that the continuous drain voltage wave- form may be observed. it is recommended that the v c power supply be turned on first and the drain pin power supply second if continuous drain voltage waveforms are to be observed. the 12.5% chance of being in the correct state is due to the divide-by-8 counter. temporarily shorting the control pin to the source pin will reset t opswitch-gx, which then will come up in the correct state. figure 54. current limit vs. multi-function pin current. figure 55. current limit vs. external current limit resistance. 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 60 40 80 100 120 140 160 180 200 -250 -200 -150 -100 -50 i m ( a) current limit (a) di/dt (ma/ s) pi-2653-010802 0 scaling factors: top242: .45 top243 p/g: .75 top243 y/r/f: .90 top244 p/g: 1 top244 y/r/f: 1.35 top245: 1.80 top246: 2.70 top247: 3.60 top248: 4.50 top249: 5.40 top250: 6.32 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 60 40 80 100 120 140 160 180 200 05k 10k 15k 20k 25k 30k 35k 40k external current limit resistor r il ( ? ) current limit (a) di/dt (ma/ s) pi-2652-010802 45k scaling factors: top242: .45 top243 p/g: .75 top243 y/r/f: .90 top244 p/g: 1 top244 y/r/f: 1.35 top245: 1.80 top246: 2.70 top247: 3.60 top248: 4.50 top249: 5.40 top250: 6.32 maximum and minimum levels are based on characterization. minimum typical maximum
t op242-250 42 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 t ypical performance characteristics (cont.) figure 56. breakdown voltage vs. temperature. figure 57. frequency vs. temperature. figure 58. internal current limit vs. temperature. figure 59. external current limit vs. temperature with r il =12 k ? . figure 60. overvoltage threshold vs. temperature. figure 61. under-voltage threshold vs. temperature. 1.1 1.0 0.9 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) breakdown voltage (normalized to 25 c) pi-176b-033001 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-1123a-033001 output frequency (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-2555-033001 current limit (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-2554-033001 current limit (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-2553-033001 overvoltage threshold (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-2552-033001 under-voltage threshold (normalized to 25 c)
t op242-250 43 h 9/02 t ypical performance characteristics (cont.) 6 5 4 3 2 1 0 -300 -200 -100 0 100 200 300 400 500 pi-2542-102700 multi-function pin voltage (v) multi-function pin current ( a) see expanded version figure 63a. multi-function pin voltage vs. current. figure 63b. multi-function pin voltage vs. current (expanded). figure 64. control current out at 0% duty cycle vs. temperature. figure 65. max. duty cycle reduction onset threshold current vs. temperature. 6.0 4.5 5.5 5.0 2.0 0 100 200 300 400 line-sense pin current ( a) line sense pin voltage (v) pi-2688-102700 3.0 2.5 3.5 4.0 figure 62a. line-sense pin voltage vs. current. figure 62b. external current limit pin voltage vs. current. 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-2562-033001 control current (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) pi-2563-033001 onset threshold current (normalized to 25 c) 1.6 1.0 1.4 1.2 0 -240 -180 -60 -120 0 external current limit pin current ( a) external current limit pin voltage (v) pi-2689-102300 0.4 0.2 0.6 0.8 v x = 1.33 - ? i x ? x 0.66 k ? -200 a i x -25 a 1.2 1.4 1.6 0.4 0.6 0.2 0.8 1.0 0 -300 -200 -150 -50 -250 -100 0 multi-function pin voltage (v) pi-2541-102700 multi-function pin current ( a) v m = 1.37 - ? i m ? x 1 k ? -200 a i m -25 a
t op242-250 44 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 t ypical performance characteristics (cont.) 0 100 200 300 400 500 600 10 100 1000 10000 pi-2646-010802 drain voltage (v) drain capacitance (pf) top250 1.17 top249 1.00 top248 0.83 top247 0.67 top246 0.50 top245 0.33 top244 0.25 top243 0.17 top242 0.08 scaling factors: 600 400 500 200 100 300 0 0 200 100 400 500 300 600 drain voltage (v) power (mw) pi-2650-020802 top250 1.17 top249 1.00 top248 0.83 top247 0.67 top246 0.50 top245 0.33 top244 0.25 top243 0.17 top242 0.08 scaling factors: figure 68. c oss vs. drain voltage. figure 66. output characteristics. 1.2 0.8 1.0 0 -50 050 100 150 junction temperature ( c) remote off drain supply current (normalized to 25 c) pi-2690-102700 0.2 0.4 0.6 figure 70. remote off drain supply current vs. temperature. 6 5 0 0 246810 12 14 16 18 20 drain voltage (v) drain current (a) pi-2645-010802 2 1 t case = 25 c t case = 100 c 4 3 top250 1.17 top249 1.00 top248 0.83 top247 0.67 top246 0.50 top245 0.33 top244 0.25 top243 0.17 top242 0.08 scaling factors: figure 67. i c vs. drain voltage. figure 69. drain capacitance power. 2 1.2 1.6 0 020406 080 100 drain voltage (v) control pin charging current (ma) pi-2564-101499 0.4 0.8 v c = 5 v
t op242-250 45 h 9/02 topswitch product family gx series number package identifier g plastic surface mount dip p plastic dip y plastic to-220-7c r plastic to-263-7c (available only with tl option) f plastic to-262 package/lead options blank standard configurations tl tape & reel, (g package: 1000 min., r package: 750 min.) part ordering information top 242 g - tl (242, 243 & 244 only) pi-2644-040501 notes: 1. controlling dimensions are inches. millimeter dimensions are shown in parentheses. 2. pin numbers start with pin 1, and continue from left to right when viewed from the front. 3. dimensions do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15mm) on any side. 4. minimum metal to metal spacing at the pack- age body for omitted pin locations is .068 inch (1.73 mm). 5. position of terminals to be measured at a location .25 (6.35) below the package body. 6. all terminals are solder plated. y07c pin 1 pin 7 mounting hole pattern .050 (1.27) .150 (3.81) .050 (1.27) .150 (3.81) .050 (1.27) .050 (1.27) .100 (2.54) .180 (4.58) .200 (5.08) pin 1 + .010 (.25) m .467 (11.86) .487 (12.37) .400 (10.16) .415 (10.54) .146 (3.71) .156 (3.96) .860 (21.84) .880 (22.35) .026 (.66) .032 (.81) .050 (1.27) bsc .150 (3.81) bsc .108 (2.74) ref pin 1 & 7 7 typ. pin 2 & 4 .040 (1.02) .060 (1.52) .190 (4.83) .210 (5.33) .015 (.38) .020 (.51) .095 (2.41) .115 (2.92) .236 (5.99) .260 (6.60) .165 (4.19) .185 (4.70) .040 (1.02) .060 (1.52) .045 (1.14) .055 (1.40) .670 (17.02) ref. .570 (14.48) ref. to-220-7c
t op242-250 46 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 notes: 1. package dimensions conform to jedec specification ms-001-ab (issue b 7/85) for standard dual-in-line (dip) package with .300 inch row spacing. 2. controlling dimensions are inches. millimeter sizes are shown in parentheses. 3. dimensions shown do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15) on any side. 4. pin locations start with pin 1, and continue counter-clock- wise to pin 8 when viewed from the top. the notch and/or dimple are aids in locating pin 1. pin 6 is omitted. 5. minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. lead width measured at package body. 7. lead spacing measured with the leads constrained to be perpendicular to plane t. .008 (.20) .015 (.38) .300 (7.62) bsc (note 7) .300 (7.62) .390 (9.91) .367 (9.32) .387 (9.83) .240 (6.10) .260 (6.60) .125 (3.18) .145 (3.68) .057 (1.45) .068 (1.73) .120 (3.05) .140 (3.56) .015 (.38) minimum .050 (1.27) .065 (1.65) .100 (2.54) bsc .014 (.36) .022 (.56) -e- pin 1 seating plane -d- -t- p08b dip-8b pi-2551-101102 d s .004 (.10) t e d s .010 (.25) m (note 6) smd-8b pi-2546-101102 .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) .004 (.10) 0 - 8 .367 (9.32) .387 (9.83) .048 (1.22) .009 (.23) .065 (1.65) .032 (.81) .037 (.94) .125 (3.18) .145 (3.68) -d- notes: 1. controlling dimensions are inches. millimeter sizes are shown in parentheses. 2. dimensions shown do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15) on any side. 3. pin locations start with pin 1, and continue counter-clock pin 8 when viewed from the top. pin 6 is omitted. 4. minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. lead width measured at package body. 6. d and e are referenced datums on the package body. .057 (1.45) .068 (1.73) (note 5) e s .100 (2.54) (bsc) .372 (9.45) .240 (6.10) .388 (9.86) .260 (6.60) .010 (.25) -e- pin 1 d s .004 (.10) g08b .420 .046 .060 .060 .046 .080 pin 1 .086 .186 .286 solder pad dimensions
t op242-250 47 h 9/02 .165 (4.19) .185 (4.70) r07c to-263-7c pi-2664-040501 -a- ld #1 .580 (14.73) .620 (15.75) .396 (10.06) .415 (10.54) .326 (8.28) .336 (8.53) .055 (1.40) .066 (1.68) .100 (2.54) ref. .208 (5.28) ref. .026 (0.66) .032 (0.81) .225 (5.72) min. .245 (6.22) min. .000 (0.00) .010 (0.25) .010 (0.25) .090 (2.29) .110 (2.79) .017 (0.43) .023 (0.58) 8 - 0 .045 (1.14) .055 (1.40) .050 (1.27) notes: 1. package outline exclusive of mold flash & metal burr. 2. package outline inclusive of plating thickness. 3. foot length measured at intercept point between datum a lead surface. 4. controlling dimensions are in inches. millimeter dimensions are shown in parentheses. .004 (0.10) .315 (8.00) .128 (3.25) .038 (0.97) .050 (1.27) .380 (9.65) .638 (16.21) solder pad dimensions
t op242-250 48 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 pi-2757-091702 notes: 1. controlling dimensions are inches. millimeter dimensions are shown in parentheses. 2. pin numbers start with pin 1, and continue from left to right when viewed from the front. 3. dimensions do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15mm) on any side. 4. minimum metal to metal spacing at the pack- age body for omitted pin locations is .068 inch (1.73 mm). 5. position of terminals to be measured at a location .25 (6.35) below the package body. 6. all terminals are solder plated. f07c pin 1 pin 7 mounting hole pattern .050 (1.27) .150 (3.81) .050 (1.27) .150 (3.81) .050 (1.27) .050 (1.27) .100 (2.54) .180 (4.58) .200 (5.08) pin 1 .010 (.25) m .326 - .336 .396 - .415 .795 (20.18) ref. .026 (.66) .032 (.81) .050 (1.27) bsc .150 (3.81) bsc .055 - .066 pin 1 & 7 7 typ. pin 2 & 4 .040 (1.06) .060 (1.52) .190 (4.83) .210 (5.33) .015 (.38) .020 (.51) .095 (2.41) .115 (2.92) .165 (4.17) .185 (4.70) .040 (1.02) .060 (1.52) .045 (1.14) .055 (1.40) .595 (15.10) ref. .495 (12.56) ref. to-262-7c
t op242-250 49 h 9/02 notes
t op242-250 50 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 notes
t op242-250 51 h 9/02 notes
t op242-250 52 h 9/02 general information & table of contents product selector guide 1 data sheets 2 application notes 3 design ideas 4 design tools 5 quality and reliability 6 package information 7 dpa-switch dc-dc seminar 8 linkswitch & tinyswitch-ii ac-dc seminar 9 t opswitch-gx ac-dc seminar 10 sales representatives and distributors 11 notes - 1) added r package (d2pak). 2) corrected abbreviations (s = seconds). 3) corrected x-axis units in figure 11 ( a). 4) added missing external current limit resistor in figure 25 (r il ). 5) corrected spelling. 6) added caption for table 4. 7) corrected breakdown voltage parameter condition (t j = 25 c). 8) corrected font sizes in figures. 9) figure 40 replaced. 10) corrected schematic component values in figure 44. 1) corrected power table value. 1) added top250 device and f package (to-262). 2) added r package thermal impedance parameters and adjusted output power values in table 1. 3) adjusted off-state current value. 1) added note to parameter table for breakdown voltage measurement. 2) miscellaneous text corrections. date 11/00 7/01 9/01 1/02 9/02 revision d e f g h for the latest updates, visit our web site: www.powerint.com power integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. power integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any license under its patent rights or the rights of others. the products and applications illustrated herein may be covered by one or more u.s. and foreign patents or potentially by pending u.s. and foreign patent applications assigned to power integrations. a complete list of power integrations?patents may be found at www.powerint.com. the pi logo, topswitch , tinyswitch , and ecosmart are registered trademarks of power integrations, inc. pi expert is a trademark of power integrations, inc. ?opyright 2002, power integrations, inc. singapore power integrations, singapore 51 goldhill plaza #16-05 republic of singapore 308900 phone: +65-6358-2160 fax: +65-6358-2015 e-mail: singaporesales@powerint.com world headquarters americas power integrations, inc. 5245 hellyer avenue san jose, ca 95138 usa main: +1 408-414-9200 customer service: phone: +1 408-414-9665 fax: +1 408-414-9765 e-mail: usasales@powerint.com taiwan power integrations international holdings, inc. 17f-3, no. 510 chung hsiao e. rd., sec. 5, taipei, taiwan 110, r.o.c. phone: +886-2-2727-1221 fax: +886-2-2727-1223 e-mail: taiwansales@powerint.com china power integrations international holdings, inc. rm# 1705, bao hua bldg. 1016 hua qiang bei lu shenzhen guangdong, 518031 china phone: +86-755-8367-5143 fax: +86-755-8377-9610 e-mail: chinasales@powerint.com europe & africa power integrations (europe) ltd. centennial court easthampstead road bracknell berkshire, rg12 1yq united kingdom phone: +44-1344-462-300 fax: +44-1344-311-732 e-mail: eurosales@powerint.com korea power integrations international holdings, inc. 8th floor, dongsung building, 17-8 yoido-dong, youngdeungpo-gu, seoul, 150-874, korea phone: +82-2-782-2840 fax: +82-2-782-4427 e-mail: koreasales@powerint.com japan power integrations, k.k. keihin-tatemono 1st bldg. 12-20 shin-yokohama 2-chome kohoku-ku, yokohama-shi, kanagawa 222-0033, japan phone: +81-45-471-1021 fax: +81-45-471-3717 e-mail: japansales@powerint.com india (technical support) innovatech #1, 8th main road vasanthnagar bangalore, india 560052 phone: +91-80-226-6023 fax: +91-80-228-9727 e-mail: indiasales@powerint.com applications hotline applications fax world wide +1-408-414-9660 world wide +1-408-414-9760

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